rewrote kerneldriver and accelerant's retrace INT handling. This fixes the 'driver hanging' bug exhibiting sometimes when CRTC2 is being used as primary CRTC (driver internal feature). INT handling now exists for both CRTC1 and CRTC2: enabling only the INTs for the head currently being used as primary. (limitation can be removed once we use a driver instance 'per head' instead of 'per card'.
git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@16282 a95241bf-73f2-0310-859d-f6bbb57e9c96
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@ -4,13 +4,15 @@
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</head>
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<body>
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<p><h2>Changes done for each driverversion:</h2></p>
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<p><h1>head (SVN 0.71, Rudolf)</h1></p>
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<p><h1>head (SVN 0.72, Rudolf)</h1></p>
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<ul>
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<li>The overlay engine code now respects the B_OVERLAY_COLOR_KEY flag instead of forcing keying ON;
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<li>Hook GET_ACCELERANT_DEVICE_INFO now returns much more detailed info about the card in use;
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<li>Hooks INIT_ACCELERANT and CLONE_ACCELERANT now enforce their correct use; returning error B_NOT_ALLOWED in case of errors;
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<li>Improved coldstart RAM tests for NV10 and higher: they could fail to correctly program the card on 'high-voltage' AGP 1.0 slots (confirmed a NV11);
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<li>Added support for acceleration engine 2D command SCREEN_TO_SCREEN_SCALED_FILTERED_BLIT (as defined by Be) for all cards.
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<li>Added support for acceleration engine 2D command SCREEN_TO_SCREEN_SCALED_FILTERED_BLIT (as defined by Be) for all cards;
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<li>Fixed driver not always finding it's VGA BIOS when started and stopped more than once per system uptime 'session';
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<li>Fixed 'BScreen Sync-to-Retrace not working' bug that appeared on all dualhead cards when CRTC2 was used as primary CRTC. On some systems outthere this bug might have shown itself as a 'system (or app) hanging' error occuring while using apps that feature explicit retrace sync. Completely rewrote interrupt handling to now handle retrace syncs on both CRTC1 and CRTC2, although only the CRTC used as primary will be enabled (for now).
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</ul>
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<p><h1>nv_driver 0.67 (Rudolf)</h1></p>
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<ul>
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@ -391,18 +391,18 @@ static void dumprom (void *rom, uint32 size, pci_info pcii)
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}
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/* return 1 if vblank interrupt has occured */
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static int caused_vbi(vuint32 * regs)
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static int caused_vbi_crtc1(vuint32 * regs)
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{
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return (NV_REG32(NV32_CRTC_INTS) & 0x00000001);
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}
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/* clear the vblank interrupt */
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static void clear_vbi(vuint32 * regs)
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static void clear_vbi_crtc1(vuint32 * regs)
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{
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NV_REG32(NV32_CRTC_INTS) = 0x00000001;
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}
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static void enable_vbi(vuint32 * regs)
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static void enable_vbi_crtc1(vuint32 * regs)
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{
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/* clear the vblank interrupt */
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NV_REG32(NV32_CRTC_INTS) = 0x00000001;
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@ -412,12 +412,56 @@ static void enable_vbi(vuint32 * regs)
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NV_REG32(NV32_MAIN_INTE) = 0x00000001;
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}
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static void disable_vbi(vuint32 * regs)
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static void disable_vbi_crtc1(vuint32 * regs)
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{
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/* disable nVidia interrupt source vblank */
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NV_REG32(NV32_CRTC_INTE) &= 0xfffffffe;
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/* clear the vblank interrupt */
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NV_REG32(NV32_CRTC_INTS) = 0x00000001;
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}
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/* return 1 if vblank interrupt has occured */
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static int caused_vbi_crtc2(vuint32 * regs)
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{
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return (NV_REG32(NV32_CRTC2_INTS) & 0x00000001);
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}
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/* clear the vblank interrupt */
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static void clear_vbi_crtc2(vuint32 * regs)
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{
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NV_REG32(NV32_CRTC2_INTS) = 0x00000001;
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}
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static void enable_vbi_crtc2(vuint32 * regs)
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{
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/* clear the vblank interrupt */
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NV_REG32(NV32_CRTC2_INTS) = 0x00000001;
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/* enable nVidia interrupt source vblank */
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NV_REG32(NV32_CRTC2_INTE) |= 0x00000001;
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/* enable nVidia interrupt system hardware (b0-1) */
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NV_REG32(NV32_MAIN_INTE) = 0x00000001;
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}
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static void disable_vbi_crtc2(vuint32 * regs)
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{
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/* disable nVidia interrupt source vblank */
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NV_REG32(NV32_CRTC2_INTE) &= 0xfffffffe;
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/* clear the vblank interrupt */
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NV_REG32(NV32_CRTC2_INTS) = 0x00000001;
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}
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static void disable_vbi_all(vuint32 * regs)
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{
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/* disable nVidia interrupt source vblank */
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NV_REG32(NV32_CRTC_INTE) &= 0xfffffffe;
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/* clear the vblank interrupt */
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NV_REG32(NV32_CRTC_INTS) = 0x00000001;
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/* disable nVidia interrupt source vblank */
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NV_REG32(NV32_CRTC2_INTE) &= 0xfffffffe;
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/* clear the vblank interrupt */
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NV_REG32(NV32_CRTC2_INTS) = 0x00000001;
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/* disable nVidia interrupt system hardware (b0-1) */
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NV_REG32(NV32_MAIN_INTE) = 0x00000000;
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}
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@ -880,10 +924,13 @@ nv_interrupt(void *data)
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regs = di->regs;
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/* was it a VBI? */
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if (caused_vbi(regs)) {
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/*clear the interrupt*/
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clear_vbi(regs);
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/*release the semaphore*/
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//fixme:
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//rewrite once we use one driver instance 'per head' (instead of 'per card')
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if (caused_vbi_crtc1(regs) || caused_vbi_crtc2(regs)) {
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/* clear the interrupt(s) */
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clear_vbi_crtc1(regs);
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clear_vbi_crtc2(regs);
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/* release the semaphore */
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handled = thread_interrupt_work(flags, regs, si);
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}
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@ -1027,7 +1074,9 @@ static status_t open_hook (const char* name, uint32 flags, void** cookie) {
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result = B_OK;
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/* disable and clear any pending interrupts */
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disable_vbi(di->regs);
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//fixme:
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//distinquish between crtc1/crtc2 once all heads get seperate driver instances!
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disable_vbi_all(di->regs);
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/* preset we can't use INT related functions */
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si->ps.int_assigned = false;
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@ -1152,7 +1201,9 @@ free_hook (void* dev) {
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goto unlock_and_exit;
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/* disable and clear any pending interrupts */
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disable_vbi(regs);
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//fixme:
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//distinquish between crtc1/crtc2 once all heads get seperate driver instances!
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disable_vbi_all(regs);
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if (si->ps.int_assigned)
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{
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@ -1240,13 +1291,21 @@ control_hook (void* dev, uint32 msg, void *buf, size_t len) {
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}
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} break;
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case NV_RUN_INTERRUPTS: {
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nv_set_bool_state *ri = (nv_set_bool_state *)buf;
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if (ri->magic == NV_PRIVATE_DATA_MAGIC) {
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nv_set_vblank_int *vi = (nv_set_vblank_int *)buf;
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if (vi->magic == NV_PRIVATE_DATA_MAGIC) {
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vuint32 *regs = di->regs;
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if (ri->do_it) {
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enable_vbi(regs);
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if (!(vi->crtc)) {
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if (vi->do_it) {
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enable_vbi_crtc1(regs);
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} else {
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disable_vbi_crtc1(regs);
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}
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} else {
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disable_vbi(regs);
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if (vi->do_it) {
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enable_vbi_crtc2(regs);
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} else {
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disable_vbi_crtc2(regs);
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}
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}
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result = B_OK;
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}
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