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Better watch those 1s. These are actually signed 32 bit values, so they will

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have unexpected side effects once we shift them more than 30 bits.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@41452 a95241bf-73f2-0310-859d-f6bbb57e9c96
This commit is contained in:
Michael Lotz 2011-05-11 23:38:06 +00:00
parent ca00b28e8b
commit f91cbdde46
1 changed files with 5 additions and 5 deletions
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10
src/system/kernel/arch/x86/ioapic.cpp
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@ -56,7 +56,7 @@
// Fields of each redirection table entry // Fields of each redirection table entry
#define IO_APIC_DESTINATION_FIELD_SHIFT 56 #define IO_APIC_DESTINATION_FIELD_SHIFT 56
#define IO_APIC_DESTINATION_FIELD_MASK 0x0f #define IO_APIC_DESTINATION_FIELD_MASK 0xff
#define IO_APIC_INTERRUPT_MASK_SHIFT 16 #define IO_APIC_INTERRUPT_MASK_SHIFT 16
#define IO_APIC_INTERRUPT_MASKED 1 #define IO_APIC_INTERRUPT_MASKED 1
#define IO_APIC_INTERRUPT_UNMASKED 0 #define IO_APIC_INTERRUPT_UNMASKED 0
@ -198,7 +198,7 @@ ioapic_is_level_triggered_interrupt(int32 gsi)
return false; return false;
uint8 pin = gsi - ioapic->global_interrupt_base; uint8 pin = gsi - ioapic->global_interrupt_base;
return (ioapic->level_triggered_mask & (1 << pin)) != 0; return (ioapic->level_triggered_mask & ((uint64)1 << pin)) != 0;
} }
@ -268,10 +268,10 @@ ioapic_configure_io_interrupt(int32 gsi, uint32 config)
if (config & B_LEVEL_TRIGGERED) { if (config & B_LEVEL_TRIGGERED) {
entry |= (IO_APIC_TRIGGER_MODE_LEVEL << IO_APIC_TRIGGER_MODE_SHIFT); entry |= (IO_APIC_TRIGGER_MODE_LEVEL << IO_APIC_TRIGGER_MODE_SHIFT);
ioapic->level_triggered_mask |= (1 << pin); ioapic->level_triggered_mask |= ((uint64)1 << pin);
} else { } else {
entry |= (IO_APIC_TRIGGER_MODE_EDGE << IO_APIC_TRIGGER_MODE_SHIFT); entry |= (IO_APIC_TRIGGER_MODE_EDGE << IO_APIC_TRIGGER_MODE_SHIFT);
ioapic->level_triggered_mask &= ~(1 << pin); ioapic->level_triggered_mask &= ~((uint64)1 << pin);
} }
if (config & B_LOW_ACTIVE_POLARITY) if (config & B_LOW_ACTIVE_POLARITY)
@ -351,7 +351,7 @@ ioapic_initialize_ioapic(struct ioapic& ioapic, uint8 targetAPIC)
entry |= (IO_APIC_TRIGGER_MODE_LEVEL << IO_APIC_TRIGGER_MODE_SHIFT) entry |= (IO_APIC_TRIGGER_MODE_LEVEL << IO_APIC_TRIGGER_MODE_SHIFT)
| (IO_APIC_PIN_POLARITY_LOW_ACTIVE << IO_APIC_PIN_POLARITY_SHIFT) | (IO_APIC_PIN_POLARITY_LOW_ACTIVE << IO_APIC_PIN_POLARITY_SHIFT)
| (IO_APIC_DELIVERY_MODE_FIXED << IO_APIC_DELIVERY_MODE_SHIFT); | (IO_APIC_DELIVERY_MODE_FIXED << IO_APIC_DELIVERY_MODE_SHIFT);
ioapic.level_triggered_mask |= (1 << i); ioapic.level_triggered_mask |= ((uint64)1 << i);
} }
ioapic_write_64(ioapic, IO_APIC_REDIRECTION_TABLE + 2 * i, entry); ioapic_write_64(ioapic, IO_APIC_REDIRECTION_TABLE + 2 * i, entry);