* Turns out you must not set the source width/height UV registers (for planar
mode), but you have to set the scaling UV registers in order to have correct overlay. * In other words, overlay is working now! There are still issues with it, which can probably be attributed to missing bounds checks (the screen goes black when you leave full-screen mode in VLC - but not if overlay just stops). git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@17365 a95241bf-73f2-0310-859d-f6bbb57e9c96
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@ -251,6 +251,10 @@ struct overlay_scale {
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#define OVERLAY_FORMAT_YCbCr411 0x9
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#define OVERLAY_FORMAT_YCbCr420 0xc
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#define OVERLAY_MIRROR_NORMAL 0x0
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#define OVERLAY_MIRROR_HORIZONTAL 0x1
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#define OVERLAY_MIRROR_VERTICAL 0x2
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// The real overlay registers are written to using an update buffer
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struct overlay_registers {
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@ -78,7 +78,7 @@ update_overlay(bool updateCoefficients)
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write_to_ring(ringBuffer, COMMAND_NOOP);
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write_to_ring(ringBuffer, COMMAND_OVERLAY_FLIP | COMMAND_OVERLAY_CONTINUE);
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write_to_ring(ringBuffer, (uint32)gInfo->shared_info->physical_overlay_registers
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/* | (updateCoefficients ? OVERLAY_UPDATE_COEFFICIENTS : 0)*/);
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/*| (updateCoefficients ? OVERLAY_UPDATE_COEFFICIENTS : 0)*/);
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ring_command_complete(ringBuffer);
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TRACE(("update overlay: UPDATE: %lx, TEST: %lx, STATUS: %lx, EXTENDED_STATUS: %lx\n",
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@ -371,31 +371,42 @@ intel_configure_overlay(overlay_token overlayToken, const overlay_buffer *buffer
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registers->window_width = window->width;
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registers->window_height = window->height;
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// Note: in non-planar mode, you *must* not program the source width/height
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// UV registers - they must stay cleared, or the chip is doing strange stuff.
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// On the other hand, you have to program the UV scaling registers, or the
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// result will be wrong, too.
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registers->source_width_rgb = view->width;
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registers->source_width_uv = view->width;
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registers->source_height_rgb = view->height;
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registers->source_height_uv = view->height;
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registers->source_bytes_per_row_rgb = (((overlay->buffer_offset + buffer->width + 0x1f) >> 5)
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- (overlay->buffer_offset >> 5) - 1);
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registers->source_bytes_per_row_uv = (((overlay->buffer_offset + buffer->width + 0x1f) >> 5)
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- (overlay->buffer_offset >> 5) - 1);
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registers->source_bytes_per_row_rgb = (((overlay->buffer_offset + (view->width << 1)
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+ 0x1f) >> 5) - (overlay->buffer_offset >> 5) - 1) << 2;
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uint32 horizontalScale = (view->width << 12) / window->width;
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uint32 horizontalScale = ((view->width - 1) << 12) / window->width;
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uint32 verticalScale = ((view->height - 1) << 12) / window->height;
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uint32 horizontalScaleUV = horizontalScale >> 1;
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uint32 verticalScaleUV = verticalScale >> 1;
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horizontalScale = horizontalScaleUV << 1;
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verticalScale = verticalScaleUV << 1;
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// horizontal scaling
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registers->scale_rgb.horizontal_downscale_factor = horizontalScale >> 12;
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registers->scale_rgb.horizontal_scale_fraction = horizontalScale & 0xfff;
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registers->scale_uv.horizontal_downscale_factor = horizontalScaleUV >> 12;
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registers->scale_uv.horizontal_scale_fraction = horizontalScaleUV & 0xfff;
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uint32 verticalScale = (view->height << 12) / window->height;
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// vertical scaling
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registers->scale_rgb.vertical_scale_fraction = verticalScale & 0xfff;
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registers->scale_uv.vertical_scale_fraction = verticalScaleUV & 0xfff;
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registers->vertical_scale_rgb = verticalScale >> 12;
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registers->vertical_scale_uv = verticalScale >> 12;
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registers->vertical_scale_uv = verticalScaleUV >> 12;
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TRACE(("scale: h = %ld.%ld, v = %ld.%ld\n", horizontalScale >> 12,
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horizontalScale & 0xfff, verticalScale >> 12, verticalScale & 0xfff));
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if (verticalScale != gInfo->last_vertical_overlay_scale
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|| horizontalScale != gInfo->last_horizontal_overlay_scale) {
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// TODO: recompute phase coefficients
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// TODO: recompute phase coefficients (take from X driver)
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updateCoefficients = true;
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gInfo->last_vertical_overlay_scale = verticalScale;
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gInfo->last_horizontal_overlay_scale = horizontalScale;
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}
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@ -404,19 +415,13 @@ intel_configure_overlay(overlay_token overlayToken, const overlay_buffer *buffer
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gInfo->last_overlay_frame = *(overlay_frame *)window;
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}
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//registers->color_control_output_mode = true;
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registers->color_control_output_mode = true;
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registers->select_pipe = 0;
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// program buffer
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registers->buffer_rgb0 = overlay->buffer_offset;
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// registers->buffer_rgb1 = overlay->buffer_offset;
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// registers->buffer_u0 = overlay->buffer_offset;
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// registers->buffer_u1 = overlay->buffer_offset;
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// registers->buffer_v0 = overlay->buffer_offset;
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// registers->buffer_v1 = overlay->buffer_offset;
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registers->stride_rgb = buffer->bytes_per_row;
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registers->stride_uv = buffer->bytes_per_row;
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switch (buffer->space) {
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case B_RGB15:
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@ -433,6 +438,8 @@ intel_configure_overlay(overlay_token overlayToken, const overlay_buffer *buffer
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break;
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}
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registers->mirroring_mode = (window->flags & B_OVERLAY_HORIZONTAL_MIRRORING) != 0
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? OVERLAY_MIRROR_HORIZONTAL : OVERLAY_MIRROR_NORMAL;
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registers->ycbcr422_order = 0;
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if (!gInfo->shared_info->overlay_active) {
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