From f369957d032802e02ed39d1ac0e2cc32c38ba4ec Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?J=C3=A9r=C3=B4me=20Duval?= <jerome.duval@gmail.com>
Date: Fri, 19 Feb 2016 22:33:41 +0100
Subject: [PATCH] via.accelerant: move enums out of the struct.

---
 .../private/graphics/via/DriverInterface.h    | 133 +++++++++---------
 1 file changed, 67 insertions(+), 66 deletions(-)

diff --git a/headers/private/graphics/via/DriverInterface.h b/headers/private/graphics/via/DriverInterface.h
index 5fecfd2e57..12ebef0c7c 100644
--- a/headers/private/graphics/via/DriverInterface.h
+++ b/headers/private/graphics/via/DriverInterface.h
@@ -97,6 +97,73 @@ typedef struct settings {  // apsed, see comments in skel.settings
 	bool   pgm_panel;
 } settings;
 
+/* card info - information gathered from PINS (and other sources) */
+enum
+{	// card_type in order of date of VIA chip design (fixme: check order)
+	VT3122 = 0,
+	VT3022,
+	VT7205,
+	VT3205,
+	VT3108,
+	VT3204NC,
+	NV04,
+	NV05,
+	NV05M64,
+	NV06,
+	NV10,
+	NV11,
+	NV11M,
+	NV15,
+	NV17,
+	NV17M,
+	NV18,
+	NV18M,
+	NV20,
+	NV25,
+	NV28,
+	NV30,
+	NV31,
+	NV34,
+	NV35,
+	NV36,
+	NV38,
+	NV40,
+	NV41,
+	NV43,
+	NV45
+};
+enum
+{	// card_arch in order of date of VIA chip design
+	CLE266 = 0,
+	KM400,
+	K8M800,
+	NV04A,
+	NV10A,
+	NV20A,
+	NV30A,
+	NV40A
+};
+enum
+{	// tvout_chip_type in order of capability (more or less)
+	NONE = 0,
+	CH7003,
+	CH7004,
+	CH7005,
+	CH7006,
+	CH7007,
+	CH7008,
+	SAA7102,
+	SAA7103,
+	SAA7104,
+	SAA7105,
+	BT868,
+	BT869,
+	CX25870,
+	CX25871,
+	NVIDIA
+};
+
+
 /*shared info*/
 typedef struct {
   /*a few ID things*/
@@ -171,72 +238,6 @@ typedef struct {
 		benaphore	lock;		/* for serializing access to the acceleration engine */
 	} engine;
 
-  /* card info - information gathered from PINS (and other sources) */
-	enum
-	{	// card_type in order of date of VIA chip design (fixme: check order)
-		VT3122 = 0,
-		VT3022,
-		VT7205,
-		VT3205,
-		VT3108,
-		VT3204NC,
-		NV04,
-		NV05,
-		NV05M64,
-		NV06,
-		NV10,
-		NV11,
-		NV11M,
-		NV15,
-		NV17,
-		NV17M,
-		NV18,
-		NV18M,
-		NV20,
-		NV25,
-		NV28,
-		NV30,
-		NV31,
-		NV34,
-		NV35,
-		NV36,
-		NV38,
-		NV40,
-		NV41,
-		NV43,
-		NV45
-	};
-	enum
-	{	// card_arch in order of date of VIA chip design
-		CLE266 = 0,
-		KM400,
-		K8M800,
-		NV04A,
-		NV10A,
-		NV20A,
-		NV30A,
-		NV40A
-	};
-	enum
-	{	// tvout_chip_type in order of capability (more or less)
-		NONE = 0,
-		CH7003,
-		CH7004,
-		CH7005,
-		CH7006,
-		CH7007,
-		CH7008,
-		SAA7102,
-		SAA7103,
-		SAA7104,
-		SAA7105,
-		BT868,
-		BT869,
-		CX25870,
-		CX25871,
-		NVIDIA
-	};
-
 	struct
 	{
 		/* specialised registers for card initialisation read from NV BIOS (pins) */