From f11d3df9aa3b3719b4d6058cbf58b6893ee4c651 Mon Sep 17 00:00:00 2001 From: Alexander von Gluck IV Date: Tue, 28 Apr 2015 21:02:51 -0500 Subject: [PATCH] radeon_hd: DP encoder. Fix PVS 2022 to 2025 * Don't overload uint8 dpClock with 27k * This might be causing a lot of DP issues as the DP clock rate is pretty important --- src/add-ons/accelerants/radeon_hd/encoder.cpp | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/add-ons/accelerants/radeon_hd/encoder.cpp b/src/add-ons/accelerants/radeon_hd/encoder.cpp index b814358de2..91d7046269 100644 --- a/src/add-ons/accelerants/radeon_hd/encoder.cpp +++ b/src/add-ons/accelerants/radeon_hd/encoder.cpp @@ -626,7 +626,7 @@ encoder_dig_setup(uint32 connectorIndex, uint32 pixelClock, int command) tableMajor, tableMinor); dp_info* dpInfo = &gConnector[connectorIndex]->dpInfo; - uint8 dpClock = 0; + uint32 dpClock = 0; if (dpInfo->valid == true) dpClock = dpInfo->linkRate; @@ -1231,7 +1231,7 @@ transmitter_dig_setup(uint32 connectorIndex, uint32 pixelClock, dp_info* dpInfo = &gConnector[connectorIndex]->dpInfo; - uint8 dpClock = 0; + uint32 dpClock = 0; int dpLaneCount = 0; if (dpInfo->valid == true) { dpClock = dpInfo->linkRate;