* My changes to the ide_adapter.h broke the silicon_image_3112 which I didn't
notice until now. Fixed again. * Cleanup. git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@22840 a95241bf-73f2-0310-859d-f6bbb57e9c96
This commit is contained in:
Axel Dörfler
parent
8e185f271f
commit
ee75b36dea
@ -3,11 +3,13 @@
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* Distributed under the terms of the MIT License.
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*/
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#include <KernelExport.h>
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#include <stdlib.h>
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#include <string.h>
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#include <KernelExport.h>
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#include <device_manager.h>
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#include <bus/IDE.h>
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#include <ide_adapter.h>
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#include <block_io.h>
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@ -25,16 +27,18 @@ enum asic_type {
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ASIC_SI3114 = 1,
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};
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#if 0
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static const char *adapter_asic_names[] = {
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"si3112",
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"si3114",
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NULL
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};
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#endif
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static const struct {
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uint16 channel_count;
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uint32 mmio_bar_size;
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} asic_data[2] = {
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} kASICData[2] = {
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{ 2, 0x200 },
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{ 4, 0x400 },
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};
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@ -46,7 +50,7 @@ static const struct {
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uint16 sien;
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uint16 stat;
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const char *name;
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} controller_channel_data[] = {
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} kControllerChannelData[] = {
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{ 0x80, 0x8A, 0x00, 0x148, 0xA0, "Primary Channel" },
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{ 0xC0, 0xCA, 0x08, 0x1C8, 0xE0, "Secondary Channel" },
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{ 0x280, 0x28A, 0x200, 0x348, 0x2A0, "Tertiary Channel" },
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@ -66,7 +70,7 @@ typedef struct controller_data {
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pci_device device;
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device_node_handle node;
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struct channel_data *channel[4]; // XXX only for interrupt workaround
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int channel_count; // XXX only for interrupt workaround
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@ -75,14 +79,13 @@ typedef struct controller_data {
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area_id mmio_area;
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uint32 mmio_addr;
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uint32 lost; // != 0 if device got removed, i.e. if it must not
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// be accessed anymore
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} controller_data;
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typedef struct channel_data {
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pci_device_module_info *pci;
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device_node_handle node;
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pci_device device;
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@ -103,7 +106,6 @@ typedef struct channel_data {
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void * prdt_phys;
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uint32 dma_active;
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uint32 lost;
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} channel_data;
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@ -114,13 +116,14 @@ static device_manager_info * dm;
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static status_t device_control_write(void *channel_cookie, uint8 val);
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static int32 handle_interrupt(void *arg);
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static float
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controller_supports(device_node_handle parent, bool *_noConnection)
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{
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char *bus;
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uint16 vendor_id;
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uint16 device_id;
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uint16 vendorID;
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uint16 deviceID;
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// get the bus (should be PCI)
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if (dm->get_attr_string(parent, B_DRIVER_BUS, &bus, false) != B_OK)
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return B_ERROR;
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@ -129,16 +132,15 @@ controller_supports(device_node_handle parent, bool *_noConnection)
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return B_ERROR;
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}
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free(bus);
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// get vendor and device ID
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if (dm->get_attr_uint16(parent, PCI_DEVICE_VENDOR_ID_ITEM, &vendor_id, false) != B_OK
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|| dm->get_attr_uint16(parent, PCI_DEVICE_DEVICE_ID_ITEM, &device_id, false) != B_OK) {
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if (dm->get_attr_uint16(parent, PCI_DEVICE_VENDOR_ID_ITEM, &vendorID, false) != B_OK
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|| dm->get_attr_uint16(parent, PCI_DEVICE_DEVICE_ID_ITEM, &deviceID, false) != B_OK) {
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return B_ERROR;
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}
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#define ID(v,d) (((v)<< 16) | (d))
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switch (ID(vendor_id, device_id)) {
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#define ID(v, d) (((v) << 16) | (d))
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switch (ID(vendorID, deviceID)) {
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case ID(0x1095, 0x3112):
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case ID(0x1095, 0x3114):
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break;
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@ -146,7 +148,7 @@ controller_supports(device_node_handle parent, bool *_noConnection)
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return 0.0f;
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}
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TRACE("controller found! vendor 0x%04x, device 0x%04x\n", vendor_id, device_id);
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TRACE("controller found! vendor 0x%04x, device 0x%04x\n", vendorID, deviceID);
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return 0.8f;
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}
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@ -158,41 +160,42 @@ controller_probe(device_node_handle parent)
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pci_device device;
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pci_device_module_info *pci;
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device_node_handle controller_node;
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uint32 mmio_base;
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uint16 device_id;
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uint8 int_num;
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int asic_index;
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int chan_index;
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uint32 mmioBase;
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uint16 deviceID;
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uint8 interruptNumber;
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int asicIndex;
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int channelIndex;
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status_t res;
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TRACE("controller_probe\n");
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if (dm->init_driver(parent, NULL, (driver_module_info **)&pci, (void **)&device) != B_OK)
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if (dm->init_driver(parent, NULL, (driver_module_info **)&pci,
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(void **)&device) != B_OK)
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return B_ERROR;
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device_id = pci->read_pci_config(device, PCI_device_id, 2);
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int_num = pci->read_pci_config(device, PCI_interrupt_line, 1);
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mmio_base = pci->read_pci_config(device, PCI_base_registers + 20, 4);
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mmio_base &= PCI_address_io_mask;
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switch (device_id) {
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deviceID = pci->read_pci_config(device, PCI_device_id, 2);
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interruptNumber = pci->read_pci_config(device, PCI_interrupt_line, 1);
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mmioBase = pci->read_pci_config(device, PCI_base_registers + 20, 4)
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& PCI_address_io_mask;
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switch (deviceID) {
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case 0x3112:
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asic_index = ASIC_SI3112;
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asicIndex = ASIC_SI3112;
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break;
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case 0x3114:
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asic_index = ASIC_SI3114;
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asicIndex = ASIC_SI3114;
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break;
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default:
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TRACE("unsupported asic\n");
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goto err;
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}
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if (!mmio_base) {
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if (!mmioBase) {
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TRACE("mmio not configured\n");
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goto err;
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}
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if (int_num == 0 || int_num == 0xff) {
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if (interruptNumber == 0 || interruptNumber == 0xff) {
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TRACE("irq not configured\n");
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goto err;
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}
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@ -200,7 +203,7 @@ controller_probe(device_node_handle parent)
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{
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io_resource_handle resource_handles[2];
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io_resource resources[2] = {
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{ IO_MEM, mmio_base, asic_data[asic_index].mmio_bar_size },
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{ IO_MEM, mmioBase, kASICData[asicIndex].mmio_bar_size },
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{}
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};
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@ -219,7 +222,7 @@ controller_probe(device_node_handle parent)
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// there are always max. 2 devices
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// (unless this is a Compact Flash Card with a built-in IDE controller,
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// which has exactly 1 device)
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{ IDE_CONTROLLER_MAX_DEVICES_ITEM, B_UINT8_TYPE, { ui8: asic_data[asic_index].channel_count }},
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{ IDE_CONTROLLER_MAX_DEVICES_ITEM, B_UINT8_TYPE, { ui8: kASICData[asicIndex].channel_count }},
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// of course we can DMA
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{ IDE_CONTROLLER_CAN_DMA_ITEM, B_UINT8_TYPE, { ui8: true }},
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// command queuing always works
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@ -239,9 +242,9 @@ controller_probe(device_node_handle parent)
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{ B_BLOCK_DEVICE_MAX_SG_BLOCKS, B_UINT32_TYPE, { ui32: IDE_ADAPTER_MAX_SG_COUNT }},
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// private data to find controller
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{ "silicon_image_3112/asic_index", B_UINT32_TYPE, { ui32: asic_index }},
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{ "silicon_image_3112/mmio_base", B_UINT32_TYPE, { ui32: mmio_base }},
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{ "silicon_image_3112/int_num", B_UINT32_TYPE, { ui32: int_num }},
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{ "silicon_image_3112/asic_index", B_UINT32_TYPE, { ui32: asicIndex }},
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{ "silicon_image_3112/mmio_base", B_UINT32_TYPE, { ui32: mmioBase }},
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{ "silicon_image_3112/int_num", B_UINT32_TYPE, { ui32: interruptNumber }},
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{ NULL }
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};
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@ -256,23 +259,23 @@ controller_probe(device_node_handle parent)
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}
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// publish channel nodes
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for (chan_index = 0; chan_index < asic_data[asic_index].channel_count; chan_index++) {
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for (channelIndex = 0; channelIndex < kASICData[asicIndex].channel_count; channelIndex++) {
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device_attr channel_attrs[] = {
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// info about ourself and our consumer
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{ B_DRIVER_MODULE, B_STRING_TYPE, { string: CHANNEL_MODULE_NAME }},
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{ B_DRIVER_PRETTY_NAME, B_STRING_TYPE, { string: DRIVER_PRETTY_NAME }},
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{ PNP_DRIVER_CONNECTION, B_STRING_TYPE, { string: controller_channel_data[chan_index].name }},
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{ PNP_DRIVER_CONNECTION, B_STRING_TYPE, { string: kControllerChannelData[channelIndex].name }},
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{ B_DRIVER_FIXED_CHILD, B_STRING_TYPE, { string: IDE_FOR_CONTROLLER_MODULE_NAME }},
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// private data to identify channel
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{ IDE_CONTROLLER_CAN_DMA_ITEM, B_UINT8_TYPE, { ui8: true }},
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{ "silicon_image_3112/chan_index", B_UINT32_TYPE, { ui32: chan_index }},
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{ "silicon_image_3112/chan_index", B_UINT32_TYPE, { ui32: channelIndex }},
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{ NULL }
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};
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device_node_handle channel_node;
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TRACE("publishing %s\n", controller_channel_data[chan_index].name );
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TRACE("publishing %s\n", kControllerChannelData[channelIndex].name );
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dm->register_device(controller_node, channel_attrs, resource_handles, &channel_node);
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}
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@ -293,27 +296,28 @@ err:
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static status_t
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controller_init(device_node_handle node, void *user_cookie, void **controller_cookie)
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controller_init(device_node_handle node, void *userCookie,
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void **_controllerCookie)
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{
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controller_data *controller;
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pci_device_module_info *pci;
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pci_device device;
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uint32 asic_index;
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uint32 mmio_base;
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uint32 mmio_addr;
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area_id mmio_area;
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uint32 int_num;
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uint32 asicIndex;
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uint32 mmioBase;
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uint32 mmioAddr;
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area_id mmioArea;
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uint32 interruptNumber;
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status_t res;
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uint32 temp;
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int i;
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TRACE("controller_init\n");
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if (dm->get_attr_uint32(node, "silicon_image_3112/asic_index", &asic_index, false) != B_OK)
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if (dm->get_attr_uint32(node, "silicon_image_3112/asic_index", &asicIndex, false) != B_OK)
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return B_ERROR;
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if (dm->get_attr_uint32(node, "silicon_image_3112/mmio_base", &mmio_base, false) != B_OK)
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if (dm->get_attr_uint32(node, "silicon_image_3112/mmio_base", &mmioBase, false) != B_OK)
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return B_ERROR;
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if (dm->get_attr_uint32(node, "silicon_image_3112/int_num", &int_num, false) != B_OK)
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if (dm->get_attr_uint32(node, "silicon_image_3112/int_num", &interruptNumber, false) != B_OK)
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return B_ERROR;
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controller = malloc(sizeof(controller_data));
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@ -322,10 +326,10 @@ controller_init(device_node_handle node, void *user_cookie, void **controller_co
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FLOW("controller %p\n", controller);
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mmio_area = map_physical_memory("Silicon Image SATA regs", (void *)mmio_base,
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asic_data[asic_index].mmio_bar_size,
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B_ANY_KERNEL_ADDRESS, 0, (void **)&mmio_addr);
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if (mmio_area < B_OK) {
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mmioArea = map_physical_memory("Silicon Image SATA regs",
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(void *)mmioBase, kASICData[asicIndex].mmio_bar_size,
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B_ANY_KERNEL_ADDRESS, 0, (void **)&mmioAddr);
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if (mmioArea < B_OK) {
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TRACE("controller_init: mapping memory failed\n");
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free(controller);
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return B_ERROR;
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@ -334,56 +338,56 @@ controller_init(device_node_handle node, void *user_cookie, void **controller_co
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if (dm->init_driver(dm->get_parent(node), NULL, (driver_module_info **)&pci, (void **)&device) < B_OK) {
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TRACE("controller_init: init parent failed\n");
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delete_area(mmio_area);
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delete_area(mmioArea);
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free(controller);
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return B_ERROR;
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}
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TRACE("asic %ld\n", asic_index);
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TRACE("int_num %ld\n", int_num);
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TRACE("mmio_addr %p\n", (void *)mmio_addr);
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TRACE("asic %ld\n", asicIndex);
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TRACE("int_num %ld\n", interruptNumber);
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TRACE("mmio_addr %p\n", (void *)mmioAddr);
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controller->pci = pci;
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controller->device = device;
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controller->node = node;
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controller->asic_index = asic_index;
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controller->int_num = int_num;
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controller->mmio_area = mmio_area;
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controller->mmio_addr = mmio_addr;
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controller->lost = 0;
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controller->pci = pci;
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controller->device = device;
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controller->node = node;
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controller->asic_index = asicIndex;
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controller->int_num = interruptNumber;
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controller->mmio_area = mmioArea;
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controller->mmio_addr = mmioAddr;
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controller->lost = 0;
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controller->channel_count = asic_data[asic_index].channel_count;
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for (i = 0; i < asic_data[asic_index].channel_count; i++)
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controller->channel_count = kASICData[asicIndex].channel_count;
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for (i = 0; i < kASICData[asicIndex].channel_count; i++)
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controller->channel[i] = 0;
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if (asic_index == ASIC_SI3114) {
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if (asicIndex == ASIC_SI3114) {
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// I put a magic spell on you
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temp = *(volatile uint32 *)(mmio_addr + SI_BMDMA2);
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*(volatile uint32 *)(mmio_addr + SI_BMDMA2) = temp | SI_INT_STEERING;
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*(volatile uint32 *)(mmio_addr + SI_BMDMA2); // flush
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temp = *(volatile uint32 *)(mmioAddr + SI_BMDMA2);
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*(volatile uint32 *)(mmioAddr + SI_BMDMA2) = temp | SI_INT_STEERING;
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*(volatile uint32 *)(mmioAddr + SI_BMDMA2); // flush
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}
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// disable all sata phy interrupts
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for (i = 0; i < asic_data[asic_index].channel_count; i++)
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*(volatile uint32 *)(mmio_addr + controller_channel_data[i].sien) = 0;
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*(volatile uint32 *)(mmio_addr + controller_channel_data[0].sien); // flush
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for (i = 0; i < kASICData[asicIndex].channel_count; i++)
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*(volatile uint32 *)(mmioAddr + kControllerChannelData[i].sien) = 0;
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*(volatile uint32 *)(mmioAddr + kControllerChannelData[0].sien); // flush
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// install interrupt handler
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res = install_io_interrupt_handler(int_num, handle_interrupt, controller, 0);
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res = install_io_interrupt_handler(interruptNumber, handle_interrupt, controller, 0);
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if (res < B_OK) {
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TRACE("controller_init: installing interrupt handler failed\n");
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dm->uninit_driver(dm->get_parent(node));
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delete_area(mmio_area);
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delete_area(mmioArea);
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free(controller);
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}
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// unmask interrupts
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temp = *(volatile uint32 *)(mmio_addr + SI_SYSCFG);
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temp &= (asic_index == ASIC_SI3114) ? (~SI_MASK_4PORT) : (~SI_MASK_2PORT);
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*(volatile uint32 *)(mmio_addr + SI_SYSCFG) = temp;
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*(volatile uint32 *)(mmio_addr + SI_SYSCFG); // flush
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temp = *(volatile uint32 *)(mmioAddr + SI_SYSCFG);
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temp &= (asicIndex == ASIC_SI3114) ? (~SI_MASK_4PORT) : (~SI_MASK_2PORT);
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*(volatile uint32 *)(mmioAddr + SI_SYSCFG) = temp;
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*(volatile uint32 *)(mmioAddr + SI_SYSCFG); // flush
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*controller_cookie = controller;
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*_controllerCookie = controller;
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TRACE("controller_init success\n");
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return B_OK;
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@ -391,9 +395,9 @@ controller_init(device_node_handle node, void *user_cookie, void **controller_co
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static status_t
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controller_uninit(void *controller_cookie)
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controller_uninit(void *controllerCookie)
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{
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controller_data *controller = controller_cookie;
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controller_data *controller = controllerCookie;
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uint32 temp;
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TRACE("controller_uninit enter\n");
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@ -416,9 +420,9 @@ controller_uninit(void *controller_cookie)
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static void
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controller_removed(device_node_handle node, void *controller_cookie)
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controller_removed(device_node_handle node, void *controllerCookie)
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{
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controller_data *controller = controller_cookie;
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controller_data *controller = controllerCookie;
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controller->lost = 1;
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}
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@ -435,14 +439,14 @@ controller_get_paths(const char ***_bus, const char ***_device)
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static status_t
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channel_init(device_node_handle node, void *user_cookie, void **channel_cookie)
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channel_init(device_node_handle node, void *userCookie, void **_channelCookie)
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{
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ide_channel ide_channel = user_cookie;
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ide_channel ide_channel = userCookie;
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controller_data *controller;
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||||
channel_data *channel;
|
||||
physical_entry pe[1];
|
||||
size_t prdt_size;
|
||||
uint32 chan_index;
|
||||
physical_entry entry;
|
||||
size_t prdtSize;
|
||||
uint32 channelIndex;
|
||||
|
||||
TRACE("channel_init enter\n");
|
||||
|
||||
@ -452,11 +456,11 @@ channel_init(device_node_handle node, void *user_cookie, void **channel_cookie)
|
||||
|
||||
TRACE("channel %p\n", channel);
|
||||
|
||||
if (dm->get_attr_uint32(node, "silicon_image_3112/chan_index", &chan_index, false) != B_OK)
|
||||
if (dm->get_attr_uint32(node, "silicon_image_3112/chan_index", &channelIndex, false) != B_OK)
|
||||
goto err;
|
||||
|
||||
TRACE("channel_index %ld\n", chan_index);
|
||||
TRACE("channel name: %s\n", controller_channel_data[chan_index].name);
|
||||
TRACE("channel_index %ld\n", channelIndex);
|
||||
TRACE("channel name: %s\n", kControllerChannelData[channelIndex].name);
|
||||
|
||||
if (dm->init_driver(dm->get_parent(node), NULL, NULL, (void **)&controller) != B_OK)
|
||||
goto err;
|
||||
@ -465,45 +469,43 @@ channel_init(device_node_handle node, void *user_cookie, void **channel_cookie)
|
||||
TRACE("mmio_addr %p\n", (void *)controller->mmio_addr);
|
||||
|
||||
// PRDT must be contiguous, dword-aligned and must not cross 64K boundary
|
||||
prdt_size = (IDE_ADAPTER_MAX_SG_COUNT * sizeof(prd_entry) + (B_PAGE_SIZE - 1)) & ~(B_PAGE_SIZE - 1);
|
||||
channel->prd_area = create_area("prd", (void **)&channel->prdt, B_ANY_KERNEL_ADDRESS, prdt_size, B_FULL_LOCK | B_CONTIGUOUS, 0);
|
||||
prdtSize = (IDE_ADAPTER_MAX_SG_COUNT * sizeof(prd_entry) + (B_PAGE_SIZE - 1)) & ~(B_PAGE_SIZE - 1);
|
||||
channel->prd_area = create_area("prd", (void **)&channel->prdt, B_ANY_KERNEL_ADDRESS, prdtSize, B_FULL_LOCK | B_CONTIGUOUS, 0);
|
||||
if (channel->prd_area < B_OK) {
|
||||
TRACE("creating prd_area failed\n");
|
||||
goto err2;
|
||||
}
|
||||
|
||||
get_memory_map(channel->prdt, prdt_size, pe, 1);
|
||||
channel->prdt_phys = (void *)(uint32)pe[0].address;
|
||||
get_memory_map(channel->prdt, prdtSize, &entry, 1);
|
||||
channel->prdt_phys = entry.address;
|
||||
|
||||
channel->pci = controller->pci;
|
||||
channel->device = controller->device;
|
||||
channel->node = node;
|
||||
channel->ide_channel = ide_channel;
|
||||
|
||||
channel->task_file = (volatile uint8 *)(controller->mmio_addr + controller_channel_data[chan_index].cmd + 1);
|
||||
channel->control_block = (volatile uint8 *)(controller->mmio_addr + controller_channel_data[chan_index].ctl);
|
||||
channel->command_block = (volatile uint8 *)(controller->mmio_addr + controller_channel_data[chan_index].cmd);
|
||||
channel->dev_ctrl = (volatile uint8 *)(controller->mmio_addr + controller_channel_data[chan_index].ctl);
|
||||
channel->bm_prdt_address = (volatile uint32 *)(controller->mmio_addr + controller_channel_data[chan_index].bmdma + ide_bm_prdt_address);
|
||||
channel->bm_status_reg = (volatile uint8 *)(controller->mmio_addr + controller_channel_data[chan_index].bmdma + ide_bm_status_reg);
|
||||
channel->bm_command_reg = (volatile uint8 *)(controller->mmio_addr + controller_channel_data[chan_index].bmdma + ide_bm_command_reg);
|
||||
channel->stat = (volatile uint32 *)(controller->mmio_addr + controller_channel_data[chan_index].stat);
|
||||
channel->task_file = (volatile uint8 *)(controller->mmio_addr + kControllerChannelData[channelIndex].cmd + 1);
|
||||
channel->control_block = (volatile uint8 *)(controller->mmio_addr + kControllerChannelData[channelIndex].ctl);
|
||||
channel->command_block = (volatile uint8 *)(controller->mmio_addr + kControllerChannelData[channelIndex].cmd);
|
||||
channel->dev_ctrl = (volatile uint8 *)(controller->mmio_addr + kControllerChannelData[channelIndex].ctl);
|
||||
channel->bm_prdt_address = (volatile uint32 *)(controller->mmio_addr + kControllerChannelData[channelIndex].bmdma + IDE_BM_PRDT_ADDRESS);
|
||||
channel->bm_status_reg = (volatile uint8 *)(controller->mmio_addr + kControllerChannelData[channelIndex].bmdma + IDE_BM_STATUS_REG);
|
||||
channel->bm_command_reg = (volatile uint8 *)(controller->mmio_addr + kControllerChannelData[channelIndex].bmdma + IDE_BM_COMMAND_REG);
|
||||
channel->stat = (volatile uint32 *)(controller->mmio_addr + kControllerChannelData[channelIndex].stat);
|
||||
|
||||
channel->lost = 0;
|
||||
channel->dma_active = 0;
|
||||
|
||||
controller->channel[chan_index] = channel;
|
||||
controller->channel[channelIndex] = channel;
|
||||
|
||||
// enable interrupts so the channel is ready to run
|
||||
device_control_write(channel, ide_devctrl_bit3);
|
||||
|
||||
*channel_cookie = channel;
|
||||
*_channelCookie = channel;
|
||||
|
||||
TRACE("channel_init leave\n");
|
||||
return B_OK;
|
||||
|
||||
err3:
|
||||
delete_area(channel->prd_area);
|
||||
err2:
|
||||
dm->uninit_driver(dm->get_parent(node));
|
||||
err:
|
||||
@ -513,9 +515,9 @@ err:
|
||||
|
||||
|
||||
static status_t
|
||||
channel_uninit(void *channel_cookie)
|
||||
channel_uninit(void *channelCookie)
|
||||
{
|
||||
channel_data *channel = channel_cookie;
|
||||
channel_data *channel = channelCookie;
|
||||
|
||||
TRACE("channel_uninit enter\n");
|
||||
|
||||
@ -538,17 +540,17 @@ channel_uninit(void *channel_cookie)
|
||||
|
||||
|
||||
static void
|
||||
channel_removed(device_node_handle node, void *channel_cookie)
|
||||
channel_removed(device_node_handle node, void *channelCookie)
|
||||
{
|
||||
channel_data *channel = channel_cookie;
|
||||
channel_data *channel = channelCookie;
|
||||
channel->lost = 1;
|
||||
}
|
||||
|
||||
|
||||
static status_t
|
||||
task_file_write(void *channel_cookie, ide_task_file *tf, ide_reg_mask mask)
|
||||
task_file_write(void *channelCookie, ide_task_file *tf, ide_reg_mask mask)
|
||||
{
|
||||
channel_data *channel = channel_cookie;
|
||||
channel_data *channel = channelCookie;
|
||||
int i;
|
||||
|
||||
FLOW("task_file_write\n");
|
||||
@ -574,9 +576,9 @@ task_file_write(void *channel_cookie, ide_task_file *tf, ide_reg_mask mask)
|
||||
|
||||
|
||||
static status_t
|
||||
task_file_read(void *channel_cookie, ide_task_file *tf, ide_reg_mask mask)
|
||||
task_file_read(void *channelCookie, ide_task_file *tf, ide_reg_mask mask)
|
||||
{
|
||||
channel_data *channel = channel_cookie;
|
||||
channel_data *channel = channelCookie;
|
||||
int i;
|
||||
|
||||
FLOW("task_file_read\n");
|
||||
@ -596,9 +598,9 @@ task_file_read(void *channel_cookie, ide_task_file *tf, ide_reg_mask mask)
|
||||
|
||||
|
||||
static uint8
|
||||
altstatus_read(void *channel_cookie)
|
||||
altstatus_read(void *channelCookie)
|
||||
{
|
||||
channel_data *channel = channel_cookie;
|
||||
channel_data *channel = channelCookie;
|
||||
|
||||
FLOW("altstatus_read\n");
|
||||
|
||||
@ -610,9 +612,9 @@ altstatus_read(void *channel_cookie)
|
||||
|
||||
|
||||
static status_t
|
||||
device_control_write(void *channel_cookie, uint8 val)
|
||||
device_control_write(void *channelCookie, uint8 val)
|
||||
{
|
||||
channel_data *channel = channel_cookie;
|
||||
channel_data *channel = channelCookie;
|
||||
|
||||
FLOW("device_control_write %x\n", val);
|
||||
|
||||
@ -627,9 +629,9 @@ device_control_write(void *channel_cookie, uint8 val)
|
||||
|
||||
|
||||
static status_t
|
||||
pio_write(void *channel_cookie, uint16 *data, int count, bool force_16bit)
|
||||
pio_write(void *channelCookie, uint16 *data, int count, bool force_16bit)
|
||||
{
|
||||
channel_data *channel = channel_cookie;
|
||||
channel_data *channel = channelCookie;
|
||||
if (channel->lost)
|
||||
return B_ERROR;
|
||||
|
||||
@ -655,9 +657,9 @@ pio_write(void *channel_cookie, uint16 *data, int count, bool force_16bit)
|
||||
|
||||
|
||||
static status_t
|
||||
pio_read(void *channel_cookie, uint16 *data, int count, bool force_16bit)
|
||||
pio_read(void *channelCookie, uint16 *data, int count, bool force_16bit)
|
||||
{
|
||||
channel_data *channel = channel_cookie;
|
||||
channel_data *channel = channelCookie;
|
||||
if (channel->lost)
|
||||
return B_ERROR;
|
||||
|
||||
@ -683,47 +685,55 @@ pio_read(void *channel_cookie, uint16 *data, int count, bool force_16bit)
|
||||
|
||||
|
||||
static status_t
|
||||
dma_prepare(void *channel_cookie, const physical_entry *sg_list, size_t sg_list_count, bool write)
|
||||
dma_prepare(void *channelCookie, const physical_entry *sg_list,
|
||||
size_t sg_list_count, bool write)
|
||||
{
|
||||
channel_data *channel = channel_cookie;
|
||||
channel_data *channel = channelCookie;
|
||||
pci_device_module_info *pci = channel->pci;
|
||||
pci_device device = channel->device;
|
||||
prd_entry *prd = channel->prdt;
|
||||
ide_bm_command command;
|
||||
ide_bm_status status;
|
||||
uint8 command;
|
||||
uint8 status;
|
||||
uint32 temp;
|
||||
int i;
|
||||
|
||||
|
||||
FLOW("dma_prepare enter\n");
|
||||
|
||||
for (i = sg_list_count - 1, prd = channel->prdt; i >= 0; --i, ++prd, ++sg_list ) {
|
||||
prd->address = B_HOST_TO_LENDIAN_INT32(pci->ram_address(device, sg_list->address));
|
||||
// 0 means 64K - this is done automatically be discarding upper 16 bits
|
||||
|
||||
for (i = sg_list_count - 1, prd = channel->prdt; i >= 0;
|
||||
--i, ++prd, ++sg_list ) {
|
||||
prd->address = B_HOST_TO_LENDIAN_INT32(pci->ram_address(device,
|
||||
sg_list->address));
|
||||
|
||||
// 0 means 64K - this is done automatically by discarding upper 16 bits
|
||||
prd->count = B_HOST_TO_LENDIAN_INT16((uint16)sg_list->size);
|
||||
prd->EOT = i == 0;
|
||||
|
||||
FLOW("%x, %x, %d\n", (int)prd->address, prd->count, prd->EOT );
|
||||
|
||||
FLOW("%x, %x, %d\n", (int)prd->address, prd->count, prd->EOT);
|
||||
}
|
||||
|
||||
// XXX move this to chan init?
|
||||
temp = (*channel->bm_prdt_address) & 3;
|
||||
temp |= B_HOST_TO_LENDIAN_INT32(pci->ram_address(device, (void *)channel->prdt_phys)) & ~3;
|
||||
temp |= B_HOST_TO_LENDIAN_INT32(pci->ram_address(device,
|
||||
(void *)channel->prdt_phys)) & ~3;
|
||||
*channel->bm_prdt_address = temp;
|
||||
|
||||
*channel->dev_ctrl; // read altstatus to flush
|
||||
|
||||
// reset interrupt and error signal
|
||||
*(uint8 *)&status = *channel->bm_status_reg;
|
||||
status.interrupt = 1;
|
||||
status.error = 1;
|
||||
*channel->bm_status_reg = *(uint8 *)&status;
|
||||
status = *channel->bm_status_reg | IDE_BM_STATUS_INTERRUPT
|
||||
| IDE_BM_STATUS_ERROR;
|
||||
*channel->bm_status_reg = status;
|
||||
|
||||
*channel->dev_ctrl; // read altstatus to flush
|
||||
|
||||
|
||||
// set data direction
|
||||
*(uint8 *)&command = *channel->bm_command_reg;
|
||||
command.from_device = !write;
|
||||
*channel->bm_command_reg = *(uint8 *)&command;
|
||||
command = *channel->bm_command_reg;
|
||||
if (write)
|
||||
command &= ~IDE_BM_COMMAND_READ_FROM_DEVICE;
|
||||
else
|
||||
command |= IDE_BM_COMMAND_READ_FROM_DEVICE;
|
||||
|
||||
*channel->bm_command_reg = command;
|
||||
|
||||
*channel->dev_ctrl; // read altstatus to flush
|
||||
|
||||
@ -734,19 +744,16 @@ dma_prepare(void *channel_cookie, const physical_entry *sg_list, size_t sg_list_
|
||||
|
||||
|
||||
static status_t
|
||||
dma_start(void *channel_cookie)
|
||||
dma_start(void *channelCookie)
|
||||
{
|
||||
channel_data *channel = channel_cookie;
|
||||
ide_bm_command command;
|
||||
channel_data *channel = channelCookie;
|
||||
uint8 command;
|
||||
|
||||
FLOW("dma_start enter\n");
|
||||
|
||||
*(uint8 *)&command = *channel->bm_command_reg;
|
||||
|
||||
command.start_stop = 1;
|
||||
command = *channel->bm_command_reg | IDE_BM_COMMAND_START_STOP;
|
||||
channel->dma_active = true;
|
||||
|
||||
*channel->bm_command_reg = *(uint8 *)&command;
|
||||
*channel->bm_command_reg = command;
|
||||
|
||||
*channel->dev_ctrl; // read altstatus to flush
|
||||
|
||||
@ -757,38 +764,33 @@ dma_start(void *channel_cookie)
|
||||
|
||||
|
||||
static status_t
|
||||
dma_finish(void *channel_cookie)
|
||||
dma_finish(void *channelCookie)
|
||||
{
|
||||
channel_data *channel = channel_cookie;
|
||||
ide_bm_command command;
|
||||
ide_bm_status status, new_status;
|
||||
channel_data *channel = channelCookie;
|
||||
uint8 command;
|
||||
uint8 status;
|
||||
|
||||
FLOW("dma_finish enter\n");
|
||||
|
||||
*(uint8 *)&command = *channel->bm_command_reg;
|
||||
|
||||
command.start_stop = 0;
|
||||
command = *channel->bm_command_reg & ~IDE_BM_COMMAND_START_STOP;
|
||||
channel->dma_active = false;
|
||||
|
||||
*channel->bm_command_reg = *(uint8 *)&command;
|
||||
|
||||
*(uint8 *)&status = *channel->bm_status_reg;
|
||||
*channel->bm_command_reg = command;
|
||||
|
||||
new_status = status;
|
||||
new_status.interrupt = 1;
|
||||
new_status.error = 1;
|
||||
status = *channel->bm_status_reg;
|
||||
|
||||
*channel->bm_status_reg = *(uint8 *)&new_status;
|
||||
*channel->bm_status_reg = status | IDE_BM_STATUS_INTERRUPT
|
||||
| IDE_BM_STATUS_ERROR;
|
||||
|
||||
*channel->dev_ctrl; // read altstatus to flush
|
||||
|
||||
if (status.error) {
|
||||
if ((status & IDE_BM_STATUS_ERROR) != 0) {
|
||||
FLOW("dma_finish: failed\n");
|
||||
return B_ERROR;
|
||||
}
|
||||
|
||||
if (!status.interrupt) {
|
||||
if (status.active) {
|
||||
if ((status & IDE_BM_STATUS_INTERRUPT) == 0) {
|
||||
if ((status & IDE_BM_STATUS_ACTIVE) != 0) {
|
||||
FLOW("dma_finish: transfer aborted\n");
|
||||
return B_ERROR;
|
||||
} else {
|
||||
@ -796,7 +798,7 @@ dma_finish(void *channel_cookie)
|
||||
return B_DEV_DATA_UNDERRUN;
|
||||
}
|
||||
} else {
|
||||
if (status.active) {
|
||||
if ((status & IDE_BM_STATUS_ACTIVE) != 0) {
|
||||
FLOW("dma_finish: buffer too large\n");
|
||||
return B_DEV_DATA_OVERRUN;
|
||||
} else {
|
||||
@ -811,7 +813,6 @@ static int32
|
||||
handle_interrupt(void *arg)
|
||||
{
|
||||
controller_data *controller = arg;
|
||||
ide_bm_status bm_status;
|
||||
uint8 status;
|
||||
int32 result, ret;
|
||||
int i;
|
||||
@ -826,11 +827,11 @@ handle_interrupt(void *arg)
|
||||
continue;
|
||||
|
||||
if (channel->dma_active) {
|
||||
*(uint8 *)&bm_status = *channel->bm_status_reg;
|
||||
if (!bm_status.interrupt)
|
||||
if ((*channel->bm_status_reg & IDE_BM_STATUS_INTERRUPT) == 0)
|
||||
continue;
|
||||
} else {
|
||||
// for PIO, read the "Task File Configuration + Status" Interrupt status
|
||||
// for PIO, read the "Task File Configuration + Status" Interrupt
|
||||
// status
|
||||
if (!(*channel->stat & (1 << 11)))
|
||||
continue;
|
||||
}
|
||||
@ -877,24 +878,24 @@ static ide_controller_interface channel_interface = {
|
||||
std_ops
|
||||
},
|
||||
|
||||
.supports_device = NULL,
|
||||
.register_device = NULL,
|
||||
.init_driver = &channel_init,
|
||||
.uninit_driver = &channel_uninit,
|
||||
.device_removed = &channel_removed,
|
||||
.device_cleanup = NULL,
|
||||
.get_supported_paths = NULL,
|
||||
.supports_device = NULL,
|
||||
.register_device = NULL,
|
||||
.init_driver = &channel_init,
|
||||
.uninit_driver = &channel_uninit,
|
||||
.device_removed = &channel_removed,
|
||||
.device_cleanup = NULL,
|
||||
.get_supported_paths = NULL,
|
||||
},
|
||||
|
||||
.write_command_block_regs = &task_file_write,
|
||||
.read_command_block_regs = &task_file_read,
|
||||
.get_altstatus = &altstatus_read,
|
||||
.write_device_control = &device_control_write,
|
||||
.write_pio = &pio_write,
|
||||
.read_pio = &pio_read,
|
||||
.prepare_dma = &dma_prepare,
|
||||
.start_dma = &dma_start,
|
||||
.finish_dma = &dma_finish,
|
||||
.write_command_block_regs = &task_file_write,
|
||||
.read_command_block_regs = &task_file_read,
|
||||
.get_altstatus = &altstatus_read,
|
||||
.write_device_control = &device_control_write,
|
||||
.write_pio = &pio_write,
|
||||
.read_pio = &pio_read,
|
||||
.prepare_dma = &dma_prepare,
|
||||
.start_dma = &dma_start,
|
||||
.finish_dma = &dma_finish,
|
||||
};
|
||||
|
||||
|
||||
@ -905,13 +906,13 @@ static driver_module_info controller_interface = {
|
||||
std_ops
|
||||
},
|
||||
|
||||
.supports_device = &controller_supports,
|
||||
.register_device = &controller_probe,
|
||||
.init_driver = &controller_init,
|
||||
.uninit_driver = &controller_uninit,
|
||||
.device_removed = &controller_removed,
|
||||
.device_cleanup = NULL,
|
||||
.get_supported_paths = &controller_get_paths,
|
||||
.supports_device = &controller_supports,
|
||||
.register_device = &controller_probe,
|
||||
.init_driver = &controller_init,
|
||||
.uninit_driver = &controller_uninit,
|
||||
.device_removed = &controller_removed,
|
||||
.device_cleanup = NULL,
|
||||
.get_supported_paths = &controller_get_paths,
|
||||
};
|
||||
|
||||
module_info *modules[] = {
|
||||
|
||||
Loading…
Reference in New Issue
Block a user