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removed NV47 references, replaced with G70. Also added G71, G72 and G73 engines.

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git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@17037 a95241bf-73f2-0310-859d-f6bbb57e9c96
This commit is contained in:
Rudolf Cornelissen 2006-04-07 15:02:34 +00:00
parent 4ac06083f4
commit ecf7bfa1db
2 changed files with 31 additions and 31 deletions
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46
src/add-ons/accelerants/nvidia/engine/nv_acc_dma.c
View File

@ -147,7 +147,7 @@ status_t nv_acc_init_dma()
} }
else else
{ {
/* NV41, 43, 44, 47 */ /* NV41, 43, 44, G70 and up */
ACCW(NV41_FBTIL0AD, 0); ACCW(NV41_FBTIL0AD, 0);
ACCW(NV41_FBTIL1AD, 0); ACCW(NV41_FBTIL1AD, 0);
ACCW(NV41_FBTIL2AD, 0); ACCW(NV41_FBTIL2AD, 0);
@ -173,15 +173,15 @@ status_t nv_acc_init_dma()
ACCW(NV41_FBTILAED, (si->ps.memory_size - 1)); ACCW(NV41_FBTILAED, (si->ps.memory_size - 1));
ACCW(NV41_FBTILBED, (si->ps.memory_size - 1)); ACCW(NV41_FBTILBED, (si->ps.memory_size - 1));
if (si->ps.card_type == NV47) //fixme: still confirm G73...
/* or ID == 0x01dx or ID == 0x029x: but no cards defined yet */ if (si->ps.card_type >= G70)
{ {
ACCW(NV47_FBTILCAD, 0); ACCW(G70_FBTILCAD, 0);
ACCW(NV47_FBTILDAD, 0); ACCW(G70_FBTILDAD, 0);
ACCW(NV47_FBTILEAD, 0); ACCW(G70_FBTILEAD, 0);
ACCW(NV47_FBTILCED, (si->ps.memory_size - 1)); ACCW(G70_FBTILCED, (si->ps.memory_size - 1));
ACCW(NV47_FBTILDED, (si->ps.memory_size - 1)); ACCW(G70_FBTILDED, (si->ps.memory_size - 1));
ACCW(NV47_FBTILEED, (si->ps.memory_size - 1)); ACCW(G70_FBTILEED, (si->ps.memory_size - 1));
} }
} }
} }
@ -679,7 +679,7 @@ status_t nv_acc_init_dma()
ACCW(NV40P_WHAT3, 0x00000108); ACCW(NV40P_WHAT3, 0x00000108);
break; break;
case NV44: case NV44:
/* and ID == 0x01dx: but no cards defined yet */ case G72:
ACCW(NV40P_WHAT0, 0x83280eff); ACCW(NV40P_WHAT0, 0x83280eff);
ACCW(NV40P_WHAT1, 0x000000a0); ACCW(NV40P_WHAT1, 0x000000a0);
@ -699,13 +699,14 @@ status_t nv_acc_init_dma()
ACCW(NV44_WHAT2, 0x00000000); ACCW(NV44_WHAT2, 0x00000000);
ACCW(NV44_WHAT3, 0x00000000); ACCW(NV44_WHAT3, 0x00000000);
break; break;
*/ case NV47: */ case G70:
/* and ID == 0x029x: but no cards defined yet */ case G71:
ACCW(NV40P_WHAT0, 0x83280eff); ACCW(NV40P_WHAT0, 0x83280eff);
ACCW(NV40P_WHAT1, 0x000000a0); ACCW(NV40P_WHAT1, 0x000000a0);
ACCW(NV40P_WHAT2, 0x07830610); ACCW(NV40P_WHAT2, 0x07830610);
ACCW(NV40P_WHAT3, 0x0000016a); ACCW(NV40P_WHAT3, 0x0000016a);
break; break;
//fixme: still confirm G73...
default: default:
ACCW(NV40P_WHAT0, 0x83280eff); ACCW(NV40P_WHAT0, 0x83280eff);
ACCW(NV40P_WHAT1, 0x000000a0); ACCW(NV40P_WHAT1, 0x000000a0);
@ -783,17 +784,16 @@ status_t nv_acc_init_dma()
} }
else else
{ {
/* NV41, 43, 44, 47 */ /* NV41, 43, 44, G70 and later */
if (si->ps.card_type == NV47) if (si->ps.card_type >= G70) //fixme: still confirm G73...
/* or ID == 0x01dx or ID == 0x029x: but no cards defined yet */
{ {
for (cnt = 0; cnt < 60; cnt++) for (cnt = 0; cnt < 60; cnt++)
{ {
/* copy NV41_FBTIL0AD upto/including NV47_FBTILEST */ /* copy NV41_FBTIL0AD upto/including G70_FBTILEST */
NV_REG32(NVACC_NV41_WHAT0 + (cnt << 2)) = NV_REG32(NVACC_NV41_WHAT0 + (cnt << 2)) =
NV_REG32(NVACC_NV41_FBTIL0AD + (cnt << 2)); NV_REG32(NVACC_NV41_FBTIL0AD + (cnt << 2));
/* copy NV41_FBTIL0AD upto/including NV47_FBTILEST */ /* copy NV41_FBTIL0AD upto/including G70_FBTILEST */
NV_REG32(NVACC_NV20_2_WHAT0 + (cnt << 2)) = NV_REG32(NVACC_NV20_2_WHAT0 + (cnt << 2)) =
NV_REG32(NVACC_NV41_FBTIL0AD + (cnt << 2)); NV_REG32(NVACC_NV41_FBTIL0AD + (cnt << 2));
} }
@ -836,14 +836,13 @@ status_t nv_acc_init_dma()
} }
else else
{ {
/* NV41, 43, 44, 47 */ /* NV41, 43, 44, G70 and later */
/* copy some RAM configuration info(?) */ /* copy some RAM configuration info(?) */
if (si->ps.card_type == NV47) if (si->ps.card_type >= G70) //fixme: still confirm G73...
/* or ID == 0x01dx or ID == 0x029x: but no cards defined yet */
{ {
ACCW(NV47_WHAT_T0, NV_REG32(NV32_PFB_CONFIG_0)); ACCW(G70_WHAT_T0, NV_REG32(NV32_PFB_CONFIG_0));
ACCW(NV47_WHAT_T1, NV_REG32(NV32_PFB_CONFIG_1)); ACCW(G70_WHAT_T1, NV_REG32(NV32_PFB_CONFIG_1));
} }
else else
{ {
@ -1238,7 +1237,7 @@ static void nv_init_for_3D_dma(void)
/* note: upon writing data into the PIPEDAT register, the PIPEADR is /* note: upon writing data into the PIPEDAT register, the PIPEADR is
* probably auto-incremented! */ * probably auto-incremented! */
/* (pipe adress = b2-16, pipe data = b0-31) */ /* (pipe adress = b2-16, pipe data = b0-31) */
/* note: pipe adresses IGRAPH registers? */ /* note: pipe adresses IGRAPH registers! */
ACCW(NV10_PIPEADR, 0x00006740); ACCW(NV10_PIPEADR, 0x00006740);
ACCW(NV10_PIPEDAT, 0x00000000); ACCW(NV10_PIPEDAT, 0x00000000);
ACCW(NV10_PIPEDAT, 0x00000000); ACCW(NV10_PIPEDAT, 0x00000000);
@ -1322,6 +1321,7 @@ static void nv_init_for_3D_dma(void)
ACCW(NV10_PIPEDAT, 0x00000000); ACCW(NV10_PIPEDAT, 0x00000000);
ACCW(NV10_PIPEDAT, 0x00000000); ACCW(NV10_PIPEDAT, 0x00000000);
/* select primitive type that will be drawn (tri's) */
ACCW(NV10_PIPEADR, 0x00000040); ACCW(NV10_PIPEADR, 0x00000040);
ACCW(NV10_PIPEDAT, 0x00000005); ACCW(NV10_PIPEDAT, 0x00000005);

16
src/add-ons/accelerants/nvidia/engine/nv_general.c
View File

@ -190,26 +190,26 @@ status_t nv_general_powerup()
break; break;
case 0x009110de: /* Nvidia GeForce 7800 GTX PCIe */ case 0x009110de: /* Nvidia GeForce 7800 GTX PCIe */
case 0x009210de: /* Nvidia Geforce 7800 GT PCIe */ case 0x009210de: /* Nvidia Geforce 7800 GT PCIe */
si->ps.card_type = NV47; si->ps.card_type = G70;
si->ps.card_arch = NV40A; si->ps.card_arch = NV40A;
sprintf(si->adi.name, "Nvidia Geforce 7800 GT PCIe"); sprintf(si->adi.name, "Nvidia Geforce 7800 GT PCIe");
sprintf(si->adi.chipset, "NV47"); sprintf(si->adi.chipset, "G70");
status = nvxx_general_powerup(); status = nvxx_general_powerup();
break; break;
case 0x009810de: /* Nvidia Geforce 7800 Go PCIe */ case 0x009810de: /* Nvidia Geforce 7800 Go PCIe */
case 0x009910de: /* Nvidia Geforce 7800 GTX Go PCIe */ case 0x009910de: /* Nvidia Geforce 7800 GTX Go PCIe */
si->ps.card_type = NV47; si->ps.card_type = G70;
si->ps.card_arch = NV40A; si->ps.card_arch = NV40A;
si->ps.laptop = true; si->ps.laptop = true;
sprintf(si->adi.name, "Nvidia Geforce 7800 GTX Go PCIe"); sprintf(si->adi.name, "Nvidia Geforce 7800 GTX Go PCIe");
sprintf(si->adi.chipset, "NV47"); sprintf(si->adi.chipset, "G70");
status = nvxx_general_powerup(); status = nvxx_general_powerup();
break; break;
case 0x009d10de: /* Nvidia Quadro FX 4500 */ case 0x009d10de: /* Nvidia Quadro FX 4500 */
si->ps.card_type = NV47; si->ps.card_type = G70;
si->ps.card_arch = NV40A; si->ps.card_arch = NV40A;
sprintf(si->adi.name, "Nvidia Quadro FX 4500"); sprintf(si->adi.name, "Nvidia Quadro FX 4500");
sprintf(si->adi.chipset, "NV47"); sprintf(si->adi.chipset, "G70");
status = nvxx_general_powerup(); status = nvxx_general_powerup();
break; break;
case 0x00a010de: /* Nvidia Aladdin TNT2 */ case 0x00a010de: /* Nvidia Aladdin TNT2 */
@ -289,10 +289,10 @@ status_t nv_general_powerup()
status = nvxx_general_powerup(); status = nvxx_general_powerup();
break; break;
case 0x00f510de: /* Nvidia GeForce FX 7800 GS AGP */ case 0x00f510de: /* Nvidia GeForce FX 7800 GS AGP */
si->ps.card_type = NV47; si->ps.card_type = G70;
si->ps.card_arch = NV40A; si->ps.card_arch = NV40A;
sprintf(si->adi.name, "Nvidia GeForce 7800 GS AGP"); sprintf(si->adi.name, "Nvidia GeForce 7800 GS AGP");
sprintf(si->adi.chipset, "NV47"); sprintf(si->adi.chipset, "G70");
status = nvxx_general_powerup(); status = nvxx_general_powerup();
break; break;
case 0x00f810de: /* Nvidia Quadro FX 3400/4400 PCIe */ case 0x00f810de: /* Nvidia Quadro FX 3400/4400 PCIe */