added preliminary DPMS support for all panels (still in test)
git-svn-id: file:///srv/svn/repos/haiku/trunk/current@11401 a95241bf-73f2-0310-859d-f6bbb57e9c96
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@ -484,49 +484,61 @@ status_t nv_crtc_dpms(bool display, bool h, bool v)
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/* start synchronous reset: required before turning screen off! */
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SEQW(RESET, 0x01);
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/* turn screen off */
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temp = SEQR(CLKMODE);
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if (display)
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{
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/* turn screen on */
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SEQW(CLKMODE, (temp & ~0x20));
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/* end synchronous reset if display should be enabled */
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/* end synchronous reset because display should be enabled */
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SEQW(RESET, 0x03);
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//'safe mode' test! feedback needed with this 'setting'!
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if (0)//si->ps.tmds1_active)
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if (si->ps.tmds1_active)
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{
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/* restore original panelsync and panel-enable */
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uint32 panelsync = 0x00000000;
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if(si->ps.p1_timing.flags & B_POSITIVE_VSYNC) panelsync |= 0x00000001;
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if(si->ps.p1_timing.flags & B_POSITIVE_HSYNC) panelsync |= 0x00000010;
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/* display enable polarity (not an official flag) */
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if(si->ps.p1_timing.flags & B_BLANK_PEDESTAL) panelsync |= 0x10000000;
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DACW(FP_TG_CTRL, ((DACR(FP_TG_CTRL) & 0xcfffffcc) | panelsync));
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//fixme?: looks like we don't need this after all:
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/* powerup both LVDS (laptop panellink) and TMDS (DVI panellink)
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* internal transmitters... */
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/* note:
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* the powerbits in this register are hardwired to the DVI connectors,
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* instead of to the DACs! (confirmed NV34) */
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//fixme...
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DACW(FP_DEBUG0, (DACR(FP_DEBUG0) & 0xcfffffff));
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//DACW(FP_DEBUG0, (DACR(FP_DEBUG0) & 0xcfffffff));
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/* ... and powerup external TMDS transmitter if it exists */
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/* (confirmed OK on NV28 and NV34) */
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CRTCW(0x59, (CRTCR(0x59) | 0x01));
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//CRTCW(0x59, (CRTCR(0x59) | 0x01));
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}
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LOG(4,("display on, "));
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}
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else
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{
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/* turn screen off */
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SEQW(CLKMODE, (temp | 0x20));
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//'safe mode' test! feedback needed with this 'setting'!
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if (0)//si->ps.tmds1_active)
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if (si->ps.tmds1_active)
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{
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/* shutoff panelsync and disable panel */
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DACW(FP_TG_CTRL, ((DACR(FP_TG_CTRL) & 0xcfffffcc) | 0x20000022));
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//fixme?: looks like we don't need this after all:
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/* powerdown both LVDS (laptop panellink) and TMDS (DVI panellink)
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* internal transmitters... */
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/* note:
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* the powerbits in this register are hardwired to the DVI connectors,
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* instead of to the DACs! (confirmed NV34) */
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//fixme...
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DACW(FP_DEBUG0, (DACR(FP_DEBUG0) | 0x30000000));
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//DACW(FP_DEBUG0, (DACR(FP_DEBUG0) | 0x30000000));
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/* ... and powerdown external TMDS transmitter if it exists */
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/* (confirmed OK on NV28 and NV34) */
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CRTCW(0x59, (CRTCR(0x59) & 0xfe));
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//CRTCW(0x59, (CRTCR(0x59) & 0xfe));
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}
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LOG(4,("display off, "));
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@ -467,49 +467,61 @@ status_t nv_crtc2_dpms(bool display, bool h, bool v)
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/* start synchronous reset: required before turning screen off! */
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SEQW(RESET, 0x01);
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/* turn screen off */
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temp = SEQR(CLKMODE);
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if (display)
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{
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/* turn screen on */
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SEQW(CLKMODE, (temp & ~0x20));
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/* end synchronous reset if display should be enabled */
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/* end synchronous reset because display should be enabled */
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SEQW(RESET, 0x03);
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//'safe mode' test! feedback needed with this 'setting'!
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if (0)//si->ps.tmds2_active)
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if (si->ps.tmds2_active)
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{
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/* restore original panelsync and panel-enable */
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uint32 panelsync = 0x00000000;
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if(si->ps.p2_timing.flags & B_POSITIVE_VSYNC) panelsync |= 0x00000001;
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if(si->ps.p2_timing.flags & B_POSITIVE_HSYNC) panelsync |= 0x00000010;
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/* display enable polarity (not an official flag) */
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if(si->ps.p2_timing.flags & B_BLANK_PEDESTAL) panelsync |= 0x10000000;
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DAC2W(FP_TG_CTRL, ((DAC2R(FP_TG_CTRL) & 0xcfffffcc) | panelsync));
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//fixme?: looks like we don't need this after all:
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/* powerup both LVDS (laptop panellink) and TMDS (DVI panellink)
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* internal transmitters... */
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/* note:
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* the powerbits in this register are hardwired to the DVI connectors,
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* instead of to the DACs! (confirmed NV34) */
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//fixme...
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DAC2W(FP_DEBUG0, (DAC2R(FP_DEBUG0) & 0xcfffffff));
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//DAC2W(FP_DEBUG0, (DAC2R(FP_DEBUG0) & 0xcfffffff));
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/* ... and powerup external TMDS transmitter if it exists */
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/* (confirmed OK on NV28 and NV34) */
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CRTC2W(0x59, (CRTC2R(0x59) | 0x01));
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//CRTC2W(0x59, (CRTC2R(0x59) | 0x01));
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}
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LOG(4,("display on, "));
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}
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else
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{
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/* turn screen off */
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SEQW(CLKMODE, (temp | 0x20));
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//'safe mode' test! feedback needed with this 'setting'!
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if (0)//si->ps.tmds2_active)
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if (si->ps.tmds2_active)
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{
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/* shutoff panelsync and disable panel */
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DAC2W(FP_TG_CTRL, ((DAC2R(FP_TG_CTRL) & 0xcfffffcc) | 0x20000022));
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//fixme?: looks like we don't need this after all:
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/* powerdown both LVDS (laptop panellink) and TMDS (DVI panellink)
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* internal transmitters... */
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/* note:
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* the powerbits in this register are hardwired to the DVI connectors,
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* instead of to the DACs! (confirmed NV34) */
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//fixme...
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DAC2W(FP_DEBUG0, (DAC2R(FP_DEBUG0) | 0x30000000));
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//DAC2W(FP_DEBUG0, (DAC2R(FP_DEBUG0) | 0x30000000));
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/* ... and powerdown external TMDS transmitter if it exists */
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/* (confirmed OK on NV28 and NV34) */
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CRTC2W(0x59, (CRTC2R(0x59) & 0xfe));
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//CRTC2W(0x59, (CRTC2R(0x59) & 0xfe));
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}
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LOG(4,("display off, "));
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@ -2304,6 +2304,8 @@ static void detect_panels()
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si->ps.p1_timing.flags = 0;
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if (DACR(FP_TG_CTRL) & 0x00000001) si->ps.p1_timing.flags |= B_POSITIVE_VSYNC;
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if (DACR(FP_TG_CTRL) & 0x00000010) si->ps.p1_timing.flags |= B_POSITIVE_HSYNC;
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/* display enable polarity (not an official flag) */
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if (DACR(FP_TG_CTRL) & 0x10000000) si->ps.p1_timing.flags |= B_BLANK_PEDESTAL;
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/* refreshrate:
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* fix a DVI or laptop flatpanel to 60Hz refresh! */
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si->ps.p1_timing.pixel_clock =
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@ -2326,6 +2328,8 @@ static void detect_panels()
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si->ps.p2_timing.flags = 0;
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if (DAC2R(FP_TG_CTRL) & 0x00000001) si->ps.p2_timing.flags |= B_POSITIVE_VSYNC;
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if (DAC2R(FP_TG_CTRL) & 0x00000010) si->ps.p2_timing.flags |= B_POSITIVE_HSYNC;
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/* display enable polarity (not an official flag) */
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if (DAC2R(FP_TG_CTRL) & 0x10000000) si->ps.p2_timing.flags |= B_BLANK_PEDESTAL;
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/* refreshrate:
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* fix a DVI or laptop flatpanel to 60Hz refresh! */
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si->ps.p2_timing.pixel_clock =
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