ATA/ATAPI Host Adapters Standard T13/1510D revision 1, page 14

Bus Master ATA Status Register, bit 2:

> NOTE - even if the device status is read, causing the device
> to deassert INTRQ, this bit shall be cleared as well.

Clearing this bit fixes DMA transfers for me.
Those didn't work because ICH9 ATA controller in
PCI native mode wouldn't stop firing interrupts
without explicit clearing, despite device status
read.



git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@30454 a95241bf-73f2-0310-859d-f6bbb57e9c96

src/add-ons/kernel/generic/ide_adapter/ide_adapter.c

@@ -206,6 +206,9 @@ ide_adapter_inthand(void *arg)
 			+ IDE_BM_STATUS_REG);
 		if ((status & IDE_BM_STATUS_INTERRUPT) == 0)
 			return B_UNHANDLED_INTERRUPT;
+		// clear pending PCI bus master DMA interrupt
+		pci->write_io_8(device, channel->bus_master_base + IDE_BM_STATUS_REG,
+			(status & 0xf8) | IDE_BM_STATUS_INTERRUPT);
 	}
 
 	// acknowledge IRQ