* Implemented transfer finishing in EHCI
* Implemented actual length calculation in EHCI * Implemented bulk transfers in EHCI * Implemented queue freeing in EHCI * Added extended buffer pointers to the EHCI structs, necessary when the controller supports 64bit * Fixed debug output and removed warnings due to wrong print format Control and bulk transfers are now working nicely for EHCI. This means that I can now get pictures from my camera with USB 2.0 speed. Note though that many things still are unimplemented (isochronous transfers, split transactions, interrupt transfers, queue chaches per pipe, ...). But it's certainly a nice step forward :-). git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@18855 a95241bf-73f2-0310-859d-f6bbb57e9c96
This commit is contained in:
Michael Lotz
parent
8c0342c639
commit
dff0c634db
@ -155,7 +155,11 @@ Hub::Explore()
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if (result < B_OK)
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continue;
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TRACE(("USB Hub (%d): port %d: status: 0x%04x; change: 0x%04x\n", DeviceAddress(), i, fPortStatus[i].status, fPortStatus[i].change));
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#ifdef TRACE_USB
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if (fPortStatus[i].change)
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TRACE(("USB Hub: port %d: status: 0x%04x; change: 0x%04x\n", i, fPortStatus[i].status, fPortStatus[i].change));
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#endif
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if (fPortStatus[i].change & PORT_STATUS_CONNECTION) {
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if (fPortStatus[i].status & PORT_STATUS_CONNECTION) {
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// new device attached!
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@ -60,7 +60,7 @@ void
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print_descriptor_chain(ehci_qtd *descriptor)
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{
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while (descriptor) {
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dprintf(" %08x n%08x a%08x t%08x %08x %08x %08x %08x %08x s%d\n",
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dprintf(" %08lx n%08lx a%08lx t%08lx %08lx %08lx %08lx %08lx %08lx s%ld\n",
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descriptor->this_phy, descriptor->next_phy,
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descriptor->alt_next_phy, descriptor->token,
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descriptor->buffer_phy[0], descriptor->buffer_phy[1],
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@ -77,10 +77,10 @@ print_descriptor_chain(ehci_qtd *descriptor)
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void
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print_queue(ehci_qh *queueHead)
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{
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dprintf("queue: t%08x n%08x ch%08x ca%08x cu%08x\n",
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dprintf("queue: t%08lx n%08lx ch%08lx ca%08lx cu%08lx\n",
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queueHead->this_phy, queueHead->next_phy, queueHead->endpoint_chars,
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queueHead->endpoint_caps, queueHead->current_qtd_phy);
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dprintf("overlay: n%08x a%08x t%08x %08x %08x %08x %08x %08x\n",
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dprintf("overlay: n%08lx a%08lx t%08lx %08lx %08lx %08lx %08lx %08lx\n",
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queueHead->overlay.next_phy, queueHead->overlay.alt_next_phy,
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queueHead->overlay.token, queueHead->overlay.buffer_phy[0],
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queueHead->overlay.buffer_phy[1], queueHead->overlay.buffer_phy[2],
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@ -136,7 +136,7 @@ EHCI::EHCI(pci_info *info, Stack *stack)
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size_t mapSize = (fPCIInfo->u.h0.base_register_sizes[0] + offset
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+ B_PAGE_SIZE - 1) & ~(B_PAGE_SIZE - 1);
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TRACE(("usb_ehci: map physical memory 0x%08x (base: 0x%08x; offset: %x); size: %d -> %d\n", fPCIInfo->u.h0.base_registers[0], physicalAddress, offset, fPCIInfo->u.h0.base_register_sizes[0], mapSize));
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TRACE(("usb_ehci: map physical memory 0x%08lx (base: 0x%08lx; offset: %lx); size: %ld\n", fPCIInfo->u.h0.base_registers[0], physicalAddress, offset, fPCIInfo->u.h0.base_register_sizes[0]));
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fRegisterArea = map_physical_memory("EHCI memory mapped registers",
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(void *)physicalAddress, mapSize, B_ANY_KERNEL_BLOCK_ADDRESS,
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B_KERNEL_READ_AREA | B_KERNEL_WRITE_AREA | B_READ_AREA | B_WRITE_AREA,
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@ -148,8 +148,11 @@ EHCI::EHCI(pci_info *info, Stack *stack)
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fCapabilityRegisters += offset;
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fOperationalRegisters = fCapabilityRegisters + ReadCapReg8(EHCI_CAPLENGTH);
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TRACE(("usb_ehci: mapped capability registers: 0x%08x\n", fCapabilityRegisters));
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TRACE(("usb_ehci: mapped operational registers: 0x%08x\n", fOperationalRegisters));
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TRACE(("usb_ehci: mapped capability registers: 0x%08lx\n", (uint32)fCapabilityRegisters));
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TRACE(("usb_ehci: mapped operational registers: 0x%08lx\n", (uint32)fOperationalRegisters));
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TRACE(("usb_ehci: structural parameters: 0x%08lx\n", ReadCapReg32(EHCI_HCSPARAMS)));
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TRACE(("usb_ehci: capability parameters: 0x%08lx\n", ReadCapReg32(EHCI_HCCPARAMS)));
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// read port count from capability register
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fPortCount = ReadCapReg32(EHCI_HCSPARAMS) & 0x0f;
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@ -157,7 +160,7 @@ EHCI::EHCI(pci_info *info, Stack *stack)
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uint32 extendedCapPointer = ReadCapReg32(EHCI_HCCPARAMS) >> EHCI_ECP_SHIFT;
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extendedCapPointer &= EHCI_ECP_MASK;
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if (extendedCapPointer > 0) {
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TRACE(("usb_ehci: extended capabilities register at %d\n", extendedCapPointer));
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TRACE(("usb_ehci: extended capabilities register at %ld\n", extendedCapPointer));
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uint32 legacySupport = sPCIModule->read_pci_config(fPCIInfo->bus,
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fPCIInfo->device, fPCIInfo->function, extendedCapPointer, 4);
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@ -215,7 +218,7 @@ EHCI::EHCI(pci_info *info, Stack *stack)
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install_io_interrupt_handler(fPCIInfo->u.h0.interrupt_line,
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InterruptHandler, (void *)this, 0);
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WriteOpReg(EHCI_USBINTR, EHCI_USBINTR_HOSTSYSERR
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| EHCI_USBINTR_USBERRINT | EHCI_USBINTR_USBINT);
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| EHCI_USBINTR_USBERRINT | EHCI_USBINTR_USBINT | EHCI_USBINTR_INTONAA);
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// allocate the periodic frame list
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fPeriodicFrameListArea = fStack->AllocateArea((void **)&fPeriodicFrameList,
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@ -248,6 +251,7 @@ EHCI::EHCI(pci_info *info, Stack *stack)
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WriteOpReg(EHCI_ASYNCLISTADDR, (uint32)fAsyncQueueHead->this_phy
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| EHCI_QH_TYPE_QH);
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TRACE(("usb_ehci: set the async list addr to 0x%08lx\n", ReadOpReg(EHCI_ASYNCLISTADDR)));
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fInitOK = true;
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TRACE(("usb_ehci: EHCI Host Controller Driver constructed\n"));
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@ -277,7 +281,7 @@ status_t
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EHCI::Start()
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{
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TRACE(("usb_ehci: starting EHCI Host Controller\n"));
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TRACE(("usb_ehci: usbcmd: 0x%08x; usbsts: 0x%08x\n", ReadOpReg(EHCI_USBCMD), ReadOpReg(EHCI_USBSTS)));
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TRACE(("usb_ehci: usbcmd: 0x%08lx; usbsts: 0x%08lx\n", ReadOpReg(EHCI_USBCMD), ReadOpReg(EHCI_USBSTS)));
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uint32 frameListSize = (ReadOpReg(EHCI_USBCMD) >> EHCI_USBCMD_FLS_SHIFT)
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& EHCI_USBCMD_FLS_MASK;
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@ -292,7 +296,7 @@ EHCI::Start()
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bool running = false;
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for (int32 i = 0; i < 10; i++) {
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uint32 status = ReadOpReg(EHCI_USBSTS);
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TRACE(("usb_ehci: try %ld: status 0x%08x\n", i, status));
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TRACE(("usb_ehci: try %ld: status 0x%08lx\n", i, status));
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if (status & EHCI_USBSTS_HCHALTED) {
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snooze(10000);
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@ -377,14 +381,15 @@ EHCI::SubmitAsyncTransfer(Transfer *transfer)
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}
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if (pipe->Type() & USB_OBJECT_CONTROL_PIPE) {
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queueHead->endpoint_chars |= EHCI_QH_CHARS_TOGGLE
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| (pipe->Speed() != USB_SPEED_HIGHSPEED ? EHCI_QH_CHARS_CONTROL : 0);
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queueHead->endpoint_chars |=
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(pipe->Speed() != USB_SPEED_HIGHSPEED ? EHCI_QH_CHARS_CONTROL : 0);
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}
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queueHead->endpoint_chars |= (3 << EHCI_QH_CHARS_RL_SHIFT)
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| (pipe->MaxPacketSize() << EHCI_QH_CHARS_MPL_SHIFT)
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| (pipe->EndpointAddress() << EHCI_QH_CHARS_EPT_SHIFT)
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| (pipe->DeviceAddress() << EHCI_QH_CHARS_DEV_SHIFT);
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| (pipe->DeviceAddress() << EHCI_QH_CHARS_DEV_SHIFT)
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| EHCI_QH_CHARS_TOGGLE;
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queueHead->endpoint_caps = (1 << EHCI_QH_CAPS_MULT_SHIFT)
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| (0x1c << EHCI_QH_CAPS_SCM_SHIFT);
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@ -750,15 +755,12 @@ EHCI::Interrupt()
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if (status & EHCI_USBSTS_INTONAA) {
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TRACE(("usb_ehci: interrupt on async advance\n"));
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acknowledge |= EHCI_USBSTS_INTONAA;
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fAsyncAdvance = true;
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}
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if (status & EHCI_USBSTS_HOSTSYSERR) {
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TRACE_ERROR(("usb_ehci: host system error!\n"));
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acknowledge |= EHCI_USBSTS_HOSTSYSERR;
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print_queue(fAsyncQueueHead);
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if (fAsyncQueueHead->next_log) {
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print_queue((ehci_qh *)fAsyncQueueHead->next_log);
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}
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}
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if (acknowledge)
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@ -884,10 +886,73 @@ EHCI::FinishTransfers()
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transfer_data *transfer = fFirstTransfer;
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Unlock();
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ehci_qh *freeListHead = NULL;
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while (transfer) {
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bool transferDone = false;
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ehci_qtd *descriptor = (ehci_qtd *)transfer->queue_head->element_log;
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// ToDo...
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#ifdef TRACE_USB
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print_queue(transfer->queue_head);
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#endif
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while (descriptor) {
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uint32 status = descriptor->token;
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if (status & EHCI_QTD_STATUS_ACTIVE) {
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// still in progress
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TRACE(("usb_ehci: qtd (0x%08lx) still active\n", descriptor->this_phy));
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break;
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}
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if (status & EHCI_QTD_STATUS_ERRMASK) {
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// a transfer error occured
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TRACE_ERROR(("usb_ehci: qtd (0x%08lx) error: 0x%08lx\n", descriptor->this_phy, status));
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uint32 callbackStatus = 0;
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if (status & EHCI_QTD_STATUS_HALTED)
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callbackStatus |= B_USB_STATUS_DEVICE_STALLED;
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if (status & EHCI_QTD_STATUS_BUFFER)
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callbackStatus |= B_USB_STATUS_DEVICE_TIMEOUT;
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if (status & EHCI_QTD_STATUS_BABBLE)
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callbackStatus |= B_USB_STATUS_ADAPTER_HARDWARE_ERROR;
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if (status & EHCI_QTD_STATUS_TERROR)
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callbackStatus |= B_USB_STATUS_DRIVER_INTERNAL_ERROR;
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// ToDo: define better error values!
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UnlinkQueueHead(transfer->queue_head, &freeListHead);
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transfer->transfer->Finished(callbackStatus, 0);
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transferDone = true;
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break;
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}
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if (descriptor->next_phy & EHCI_QTD_TERMINATE) {
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// we arrived at the last (stray) descriptor, we're done
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TRACE(("usb_ehci: qtd (0x%08lx) done\n", descriptor->this_phy));
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size_t actualLength = 0;
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uint8 lastDataToggle = 0;
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if (transfer->data_descriptor && transfer->incoming) {
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// data to read out
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actualLength = ReadDescriptorChain(
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transfer->data_descriptor,
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transfer->transfer->Vector(),
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transfer->transfer->VectorCount(),
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&lastDataToggle);
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} else {
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// calculate transfered length
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actualLength = ReadActualLength(
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(ehci_qtd *)transfer->queue_head->element_log,
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&lastDataToggle);
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}
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UnlinkQueueHead(transfer->queue_head, &freeListHead);
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transfer->transfer->TransferPipe()->SetDataToggle(lastDataToggle);
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transfer->transfer->Finished(B_USB_STATUS_SUCCESS, actualLength);
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transferDone = true;
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break;
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}
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descriptor = (ehci_qtd *)descriptor->next_log;
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}
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if (transferDone) {
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if (Lock()) {
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@ -910,6 +975,20 @@ EHCI::FinishTransfers()
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transfer = transfer->link;
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}
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}
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if (freeListHead) {
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fAsyncAdvance = false;
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// set the doorbell and wait for the host controller to notify us
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WriteOpReg(EHCI_USBCMD, ReadOpReg(EHCI_USBCMD) | EHCI_USBCMD_INTONAAD);
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while (!fAsyncAdvance)
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snooze(10);
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while (freeListHead) {
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ehci_qh *next = (ehci_qh *)freeListHead->next_log;
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FreeQueueHead(freeListHead);
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freeListHead = next;
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}
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}
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}
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}
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@ -944,11 +1023,11 @@ EHCI::CreateQueueHead()
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result->overlay.next_phy = descriptor->this_phy;
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result->overlay.alt_next_phy = EHCI_QTD_TERMINATE;
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result->overlay.token = 0;
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result->overlay.buffer_phy[0] = 0;
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result->overlay.buffer_phy[1] = 0;
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result->overlay.buffer_phy[2] = 0;
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result->overlay.buffer_phy[3] = 0;
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result->overlay.buffer_phy[4] = 0;
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for (int32 i = 0; i < 5; i++) {
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result->overlay.buffer_phy[i] = 0;
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result->overlay.ext_buffer_phy[i] = 0;
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}
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return result;
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}
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@ -959,9 +1038,8 @@ EHCI::FreeQueueHead(ehci_qh *queueHead)
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if (!queueHead)
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return;
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FreeDescriptor((ehci_qtd *)queueHead->stray_log);
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FreeDescriptorChain((ehci_qtd *)queueHead->element_log);
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fStack->FreeChunk(queueHead, (void *)queueHead->this_phy, sizeof(ehci_qh));
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}
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@ -985,7 +1063,7 @@ EHCI::LinkQueueHead(ehci_qh *queueHead)
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status_t
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EHCI::UnlinkQueueHead(ehci_qh *queueHead)
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EHCI::UnlinkQueueHead(ehci_qh *queueHead, ehci_qh **freeListHead)
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{
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if (!Lock())
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return B_ERROR;
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@ -999,6 +1077,9 @@ EHCI::UnlinkQueueHead(ehci_qh *queueHead)
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queueHead->next_log = NULL;
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queueHead->prev_log = NULL;
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queueHead->next_log = *freeListHead;
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*freeListHead = queueHead;
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Unlock();
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return B_OK;
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}
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@ -1070,9 +1151,34 @@ EHCI::FillQueueWithRequest(Transfer *transfer, ehci_qh *queueHead,
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status_t
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EHCI::FillQueueWithData(Transfer *transfer, ehci_qh *queueHead,
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ehci_qtd **dataDescriptor, bool *directionIn)
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ehci_qtd **_dataDescriptor, bool *_directionIn)
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{
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return B_ERROR;
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Pipe *pipe = transfer->TransferPipe();
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bool directionIn = (pipe->Direction() == Pipe::In);
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ehci_qtd *firstDescriptor = NULL;
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ehci_qtd *lastDescriptor = NULL;
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ehci_qtd *strayDescriptor = (ehci_qtd *)queueHead->stray_log;
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status_t result = CreateDescriptorChain(pipe, &firstDescriptor,
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&lastDescriptor, strayDescriptor, transfer->VectorLength(),
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directionIn ? EHCI_QTD_PID_IN : EHCI_QTD_PID_OUT);
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if (result < B_OK)
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return result;
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lastDescriptor->token |= EHCI_QTD_IOC;
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if (!directionIn) {
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WriteDescriptorChain(firstDescriptor, transfer->Vector(),
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transfer->VectorCount());
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}
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queueHead->element_log = firstDescriptor;
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queueHead->overlay.next_phy = firstDescriptor->this_phy;
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queueHead->overlay.alt_next_phy = EHCI_QTD_TERMINATE;
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*_dataDescriptor = firstDescriptor;
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*_directionIn = directionIn;
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return B_OK;
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}
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@ -1099,11 +1205,11 @@ EHCI::CreateDescriptor(size_t bufferSize, uint8 pid)
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result->token |= EHCI_QTD_STATUS_ACTIVE;
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if (bufferSize == 0) {
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result->buffer_log = NULL;
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result->buffer_phy[0] = 0;
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result->buffer_phy[1] = 0;
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result->buffer_phy[2] = 0;
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result->buffer_phy[3] = 0;
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result->buffer_phy[4] = 0;
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for (int32 i = 0; i < 5; i++) {
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result->buffer_phy[i] = 0;
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result->ext_buffer_phy[i] = 0;
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}
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return result;
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}
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@ -1116,9 +1222,11 @@ EHCI::CreateDescriptor(size_t bufferSize, uint8 pid)
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addr_t physicalBase = (addr_t)physicalAddress;
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result->buffer_phy[0] = physicalBase;
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result->ext_buffer_phy[0] = 0;
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for (int32 i = 1; i < 5; i++) {
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physicalBase += B_PAGE_SIZE;
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result->buffer_phy[i] = physicalBase & EHCI_QTD_PAGE_MASK;
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result->ext_buffer_phy[i] = 0;
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}
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return result;
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@ -1236,7 +1344,7 @@ EHCI::WriteDescriptorChain(ehci_qtd *topDescriptor, iovec *vector,
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if (vectorOffset >= vector[vectorIndex].iov_len) {
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if (++vectorIndex >= vectorCount) {
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TRACE(("usb_ehci: wrote descriptor chain (%d bytes, no more vectors)\n", actualLength));
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TRACE(("usb_ehci: wrote descriptor chain (%ld bytes, no more vectors)\n", actualLength));
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return actualLength;
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}
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@ -1255,7 +1363,7 @@ EHCI::WriteDescriptorChain(ehci_qtd *topDescriptor, iovec *vector,
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current = (ehci_qtd *)current->next_log;
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}
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TRACE(("usb_ehci: wrote descriptor chain (%d bytes)\n", actualLength));
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TRACE(("usb_ehci: wrote descriptor chain (%ld bytes)\n", actualLength));
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return actualLength;
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}
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@ -1271,12 +1379,13 @@ EHCI::ReadDescriptorChain(ehci_qtd *topDescriptor, iovec *vector,
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size_t vectorOffset = 0;
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size_t bufferOffset = 0;
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while (current && (current->token & EHCI_QTD_STATUS_ACTIVE) > 0) {
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while (current && (current->token & EHCI_QTD_STATUS_ACTIVE) == 0) {
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if (!current->buffer_log)
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break;
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dataToggle = current->token & EHCI_QTD_DATA_TOGGLE;
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size_t bufferSize = 0; // ToDo
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size_t bufferSize = current->buffer_size;
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bufferSize -= (current->token >> EHCI_QTD_BYTES_SHIFT) & EHCI_QTD_BYTES_MASK;
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while (true) {
|
||||
size_t length = min_c(bufferSize - bufferOffset,
|
||||
@ -1291,7 +1400,7 @@ EHCI::ReadDescriptorChain(ehci_qtd *topDescriptor, iovec *vector,
|
||||
|
||||
if (vectorOffset >= vector[vectorIndex].iov_len) {
|
||||
if (++vectorIndex >= vectorCount) {
|
||||
TRACE(("usb_ehci: read descriptor chain (%d bytes, no more vectors)\n", actualLength));
|
||||
TRACE(("usb_ehci: read descriptor chain (%ld bytes, no more vectors)\n", actualLength));
|
||||
if (lastDataToggle)
|
||||
*lastDataToggle = dataToggle > 0 ? 1 : 0;
|
||||
return actualLength;
|
||||
@ -1312,7 +1421,7 @@ EHCI::ReadDescriptorChain(ehci_qtd *topDescriptor, iovec *vector,
|
||||
current = (ehci_qtd *)current->next_log;
|
||||
}
|
||||
|
||||
TRACE(("usb_ehci: read descriptor chain (%d bytes)\n", actualLength));
|
||||
TRACE(("usb_ehci: read descriptor chain (%ld bytes)\n", actualLength));
|
||||
if (lastDataToggle)
|
||||
*lastDataToggle = dataToggle > 0 ? 1 : 0;
|
||||
return actualLength;
|
||||
@ -1326,9 +1435,10 @@ EHCI::ReadActualLength(ehci_qtd *topDescriptor, uint8 *lastDataToggle)
|
||||
ehci_qtd *current = topDescriptor;
|
||||
uint32 dataToggle = 0;
|
||||
|
||||
while (current && (current->token & EHCI_QTD_STATUS_ACTIVE) > 0) {
|
||||
while (current && (current->token & EHCI_QTD_STATUS_ACTIVE) == 0) {
|
||||
dataToggle = current->token & EHCI_QTD_DATA_TOGGLE;
|
||||
size_t length = 0; // ToDo
|
||||
size_t length = current->buffer_size;
|
||||
length -= (current->token >> EHCI_QTD_BYTES_SHIFT) & EHCI_QTD_BYTES_MASK;
|
||||
actualLength += length;
|
||||
|
||||
if (current->next_phy & EHCI_QTD_TERMINATE)
|
||||
@ -1337,7 +1447,7 @@ EHCI::ReadActualLength(ehci_qtd *topDescriptor, uint8 *lastDataToggle)
|
||||
current = (ehci_qtd *)current->next_log;
|
||||
}
|
||||
|
||||
TRACE(("usb_ehci: read actual length (%d bytes)\n", actualLength));
|
||||
TRACE(("usb_ehci: read actual length (%ld bytes)\n", actualLength));
|
||||
if (lastDataToggle)
|
||||
*lastDataToggle = dataToggle > 0 ? 1 : 0;
|
||||
return actualLength;
|
||||
|
||||
@ -9,7 +9,6 @@
|
||||
#ifndef EHCI_H
|
||||
#define EHCI_H
|
||||
|
||||
#define TRACE_USB
|
||||
#include "usb_p.h"
|
||||
#include "ehci_hardware.h"
|
||||
|
||||
@ -74,7 +73,8 @@ static int32 FinishThread(void *data);
|
||||
void FreeQueueHead(ehci_qh *queueHead);
|
||||
|
||||
status_t LinkQueueHead(ehci_qh *queueHead);
|
||||
status_t UnlinkQueueHead(ehci_qh *queueHead);
|
||||
status_t UnlinkQueueHead(ehci_qh *queueHead,
|
||||
ehci_qh **freeList);
|
||||
|
||||
// Queue functions
|
||||
status_t FillQueueWithRequest(Transfer *transfer,
|
||||
@ -133,6 +133,7 @@ static pci_module_info *sPCIModule;
|
||||
|
||||
// Async frame list
|
||||
ehci_qh *fAsyncQueueHead;
|
||||
bool fAsyncAdvance;
|
||||
|
||||
// Maintain a linked list of transfers
|
||||
transfer_data *fFirstTransfer;
|
||||
|
||||
@ -126,6 +126,7 @@ typedef struct {
|
||||
addr_t alt_next_phy;
|
||||
uint32 token;
|
||||
addr_t buffer_phy[5];
|
||||
addr_t ext_buffer_phy[5];
|
||||
|
||||
// Software Part
|
||||
addr_t this_phy;
|
||||
@ -152,6 +153,7 @@ typedef struct {
|
||||
#define EHCI_QTD_PID_SETUP 0x02
|
||||
#define EHCI_QTD_STATUS_SHIFT 0
|
||||
#define EHCI_QTD_STATUS_MASK 0x7f
|
||||
#define EHCI_QTD_STATUS_ERRMASK 0x78
|
||||
#define EHCI_QTD_STATUS_ACTIVE (1 << 7) // Active
|
||||
#define EHCI_QTD_STATUS_HALTED (1 << 6) // Halted
|
||||
#define EHCI_QTD_STATUS_BUFFER (1 << 5) // Data Buffer Error
|
||||
@ -176,6 +178,7 @@ typedef struct {
|
||||
addr_t alt_next_phy;
|
||||
uint32 token;
|
||||
addr_t buffer_phy[5];
|
||||
addr_t ext_buffer_phy[5];
|
||||
} overlay;
|
||||
|
||||
// Software Part
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user