freebsd11_network: Completely rework the bus space access system.
Previously, we wrapped FreeBSD's accessors using our own in*/out* assembly macros. Now, we skip that and just use FreeBSD's macros and assembly directly. In the process, I've added some proper abstraction, paving the way for the use of the FreeBSD layer on non-x86 platforms (which will be sooner rather than later, I hope!). This introduces some new functions required by some of the drivers I was attempting to merge (wavelanwifi...), but as it also now mirrors FreeBSD's bus access mechanisms exactly, it's possible that some nuances lost before are now preserved. So this has the potentiality to help with some of the stranger timeouts/failures on devices that work just fine on FreeBSD. Tested on VMware (pcnet), VirtualBox (pcnet, ipro1000), and a T61 (iprowifi4965.)
This commit is contained in:
Augustin Cavalier
parent
f329739cdc
commit
d97a05f774
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@ -124,7 +124,7 @@ bus_alloc_mem_resource(device_t dev, struct resource *res, int regid)
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if (res->r_mapped_area < B_OK)
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return -1;
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res->r_bustag = I386_BUS_SPACE_MEM;
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res->r_bustag = X86_BUS_SPACE_MEM;
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res->r_bushandle = (bus_space_handle_t)virtualAddr;
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return 0;
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}
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@ -133,7 +133,7 @@ bus_alloc_mem_resource(device_t dev, struct resource *res, int regid)
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static int
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bus_alloc_ioport_resource(device_t dev, struct resource *res, int regid)
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{
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res->r_bustag = I386_BUS_SPACE_IO;
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res->r_bustag = X86_BUS_SPACE_IO;
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res->r_bushandle = pci_read_config(dev, regid, 4) & PCI_address_io_mask;
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return 0;
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}
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@ -7,26 +7,31 @@
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#define _FBSD_COMPAT_MACHINE__BUS_H_
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#include <SupportDefs.h>
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typedef phys_addr_t bus_addr_t;
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#ifdef B_HAIKU_64_BIT
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typedef uint64_t bus_addr_t;
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typedef uint64_t bus_size_t;
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typedef uint64_t bus_space_tag_t;
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typedef uint64_t bus_space_handle_t;
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#else
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#if defined(__HAIKU_ARCH_PHYSICAL_64_BIT) && defined(__i386__)
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#define PAE 1
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#endif
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typedef uint32_t bus_addr_t;
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typedef uint32_t bus_size_t;
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typedef int bus_space_tag_t;
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typedef unsigned int bus_space_handle_t;
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#endif
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#endif /* _FBSD_COMPAT_MACHINE__BUS_H_ */
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@ -1,111 +1,8 @@
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/*
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* Copyright 2009, Colin Günther. All Rights Reserved.
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* Copyright 2007, Hugo Santos. All Rights Reserved.
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* Distributed under the terms of the MIT License.
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*/
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/*-
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* Copyright (c) KATO Takenori, 1999.
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*
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* All rights reserved. Unpublished rights reserved under the copyright
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* laws of Japan.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer as
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* the first lines of this file unmodified.
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* 2. Redistributions in binary form must reproduce the above copyright
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||||
* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
|
||||
* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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||||
* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* $FreeBSD$
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*/
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/* $NetBSD: bus.h,v 1.12 1997/10/01 08:25:15 fvdl Exp $ */
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/*-
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* Copyright (c) 1996, 1997 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
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* NASA Ames Research Center.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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||||
* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the NetBSD
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* Foundation, Inc. and its contributors.
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* 4. Neither the name of The NetBSD Foundation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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/*-
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* Copyright (c) 1996 Charles M. Hannum. All rights reserved.
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* Copyright (c) 1996 Christopher G. Demetriou. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by Christopher G. Demetriou
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* for the NetBSD Project.
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* 4. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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* Copyright 2009, Colin Günther. All rights reserved.
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* Copyright 2007, Hugo Santos. All rights reserved.
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* Copyright 2018, Haiku, Inc. All rights reserved.
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* Distributed under the terms of the MIT license.
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*/
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#ifndef _FBSD_COMPAT_MACHINE_BUS_H_
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#define _FBSD_COMPAT_MACHINE_BUS_H_
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@ -113,237 +10,10 @@
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#include <machine/_bus.h>
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#include <machine/cpufunc.h>
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struct resource;
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// TODO: x86 specific!
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#define I386_BUS_SPACE_IO 0
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#define I386_BUS_SPACE_MEM 1
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#define BUS_SPACE_MAXADDR_32BIT 0xffffffff
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#ifdef __x86_64__
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# define BUS_SPACE_MAXADDR 0xffffffffffffffffull
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#if defined(__i386__) || defined(__amd64__)
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# include <machine/x86/bus.h>
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#else
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# define BUS_SPACE_MAXADDR 0xffffffff
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# error Need a bus.h for this arch!
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#endif
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#define BUS_SPACE_MAXSIZE_32BIT 0xffffffff
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#define BUS_SPACE_MAXSIZE 0xffffffff
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#define BUS_SPACE_UNRESTRICTED (~0)
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#define BUS_SPACE_BARRIER_READ 1
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#define BUS_SPACE_BARRIER_WRITE 2
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// Copied from arch/x86/arch_cpu.h
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// Can't use the header as it indirectly includes arch/x86/arch_thread_types.h
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// Which has a namespace, so can't be used in FreeBSD's C-code atm.
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#define out8(value,port) \
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__asm__ ("outb %%al,%%dx" : : "a" (value), "d" (port))
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#define out16(value,port) \
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__asm__ ("outw %%ax,%%dx" : : "a" (value), "d" (port))
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#define out32(value,port) \
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__asm__ ("outl %%eax,%%dx" : : "a" (value), "d" (port))
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#define in8(port) ({ \
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uint8 _v; \
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__asm__ volatile ("inb %%dx,%%al" : "=a" (_v) : "d" (port)); \
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_v; \
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})
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#define in16(port) ({ \
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uint16 _v; \
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__asm__ volatile ("inw %%dx,%%ax":"=a" (_v) : "d" (port)); \
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_v; \
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})
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#define in32(port) ({ \
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uint32 _v; \
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__asm__ volatile ("inl %%dx,%%eax":"=a" (_v) : "d" (port)); \
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_v; \
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})
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static inline uint8_t
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bus_space_read_1(bus_space_tag_t tag, bus_space_handle_t handle,
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bus_size_t offset)
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{
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return tag == I386_BUS_SPACE_MEM
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? (*(volatile u_int8_t *)(handle + offset))
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: in8(handle + offset);
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}
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static inline uint16_t
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bus_space_read_2(bus_space_tag_t tag, bus_space_handle_t handle,
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bus_size_t offset)
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{
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return tag == I386_BUS_SPACE_MEM
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? (*(volatile u_int16_t *)(handle + offset))
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: in16(handle + offset);
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}
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static inline uint32_t
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bus_space_read_4(bus_space_tag_t tag, bus_space_handle_t handle,
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bus_size_t offset)
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{
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return tag == I386_BUS_SPACE_MEM
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? (*(volatile u_int32_t *)(handle + offset))
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: in32(handle + offset);
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}
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static inline void
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bus_space_write_1(bus_space_tag_t tag, bus_space_handle_t handle,
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bus_size_t offset, uint8_t value)
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{
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if (tag == I386_BUS_SPACE_MEM)
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*(volatile uint8_t *)(handle + offset) = value;
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else
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out8(value, handle + offset);
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}
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static inline void
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bus_space_write_2(bus_space_tag_t tag, bus_space_handle_t handle,
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bus_size_t offset, uint16_t value)
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{
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if (tag == I386_BUS_SPACE_MEM)
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*(volatile uint16_t *)(handle + offset) = value;
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else
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out16(value, handle + offset);
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}
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static inline void
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bus_space_write_4(bus_space_tag_t tag, bus_space_handle_t handle,
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bus_size_t offset, uint32_t value)
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{
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if (tag == I386_BUS_SPACE_MEM)
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*(volatile uint32_t *)(handle + offset) = value;
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else
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out32(value, handle + offset);
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}
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static inline void
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bus_space_read_region_1(bus_space_tag_t tag, bus_space_handle_t bsh,
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bus_size_t offset, u_int8_t *addr, size_t count)
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{
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if (tag == I386_BUS_SPACE_IO) {
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int _port_ = bsh + offset;
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__asm __volatile(" \n\
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cld \n\
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1: inb %w2,%%al \n\
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stosb \n\
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incl %2 \n\
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loop 1b" :
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"=D" (addr), "=c" (count), "=d" (_port_):
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"0" (addr), "1" (count), "2" (_port_) :
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"%eax", "memory", "cc");
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} else {
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void* _port_ = (void*) (bsh + offset);
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memcpy(addr, _port_, count);
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}
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}
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static inline void
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bus_space_read_region_4(bus_space_tag_t tag, bus_space_handle_t bsh,
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bus_size_t offset, u_int32_t *addr, size_t count)
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{
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if (tag == I386_BUS_SPACE_IO) {
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int _port_ = bsh + offset;
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__asm __volatile(" \n\
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cld \n\
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1: inl %w2,%%eax \n\
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stosl \n\
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addl $4,%2 \n\
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loop 1b" :
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"=D" (addr), "=c" (count), "=d" (_port_):
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"0" (addr), "1" (count), "2" (_port_) :
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"%eax", "memory", "cc");
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} else {
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void* _port_ = (void*) (bsh + offset);
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memcpy(addr, _port_, count);
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}
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}
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static inline void
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bus_space_write_region_1(bus_space_tag_t tag, bus_space_handle_t bsh,
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bus_size_t offset, const u_int8_t *addr, size_t count)
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{
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if (tag == I386_BUS_SPACE_IO) {
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int _port_ = bsh + offset;
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__asm __volatile(" \n\
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cld \n\
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1: lodsb \n\
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outb %%al,%w0 \n\
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incl %0 \n\
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loop 1b" :
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"=d" (_port_), "=S" (addr), "=c" (count):
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"0" (_port_), "1" (addr), "2" (count) :
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"%eax", "memory", "cc");
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} else {
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void* _port_ = (void*) (bsh + offset);
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memcpy(_port_, addr, count);
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}
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}
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static inline void
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bus_space_set_region_4(bus_space_tag_t tag, bus_space_handle_t bsh,
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bus_size_t offset, u_int32_t value, size_t count)
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{
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/* TODO implement */
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}
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static inline void
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bus_space_barrier(bus_space_tag_t tag, bus_space_handle_t handle,
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bus_size_t offset, bus_size_t len, int flags)
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{
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if (flags & BUS_SPACE_BARRIER_READ)
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#ifdef __x86_64__
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__asm__ __volatile__ ("lock; addl $0,0(%%rsp)" : : : "memory");
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#else
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__asm__ __volatile__ ("lock; addl $0,0(%%esp)" : : : "memory");
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#endif
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else
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__asm__ __volatile__ ("" : : : "memory");
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}
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static inline void
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bus_space_write_multi_1(bus_space_tag_t tag, bus_space_handle_t bsh,
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bus_size_t offset, const u_int8_t *addr, size_t count)
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{
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if (tag == I386_BUS_SPACE_IO)
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outsb(bsh + offset, addr, count);
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else {
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__asm __volatile(" \n\
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cld \n\
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1: lodsb \n\
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movb %%al,(%2) \n\
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loop 1b" :
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"=S" (addr), "=c" (count) :
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"r" (bsh + offset), "0" (addr), "1" (count) :
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"%eax", "memory", "cc");
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}
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}
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#include <machine/bus_dma.h>
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#define bus_space_write_stream_4(t, h, o, v) \
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bus_space_write_4((t), (h), (o), (v))
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#endif /* _FBSD_COMPAT_MACHINE_BUS_H_ */
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|
|
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@ -1,43 +1,20 @@
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/*-
|
||||
* Copyright (c) 1993 The Regents of the University of California.
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* 4. Neither the name of the University nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
|
||||
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
|
||||
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
||||
* SUCH DAMAGE.
|
||||
*
|
||||
* $FreeBSD$
|
||||
/*
|
||||
* Copyright 2009, Colin Günther. All rights reserved.
|
||||
* Copyright 2007, Hugo Santos. All rights reserved.
|
||||
* Copyright 2018, Haiku, Inc. All rights reserved.
|
||||
* Distributed under the terms of the MIT license.
|
||||
*/
|
||||
#ifndef _FBSD_COMPAT_MACHINE_CPUFUNC_H_
|
||||
#define _FBSD_COMPAT_MACHINE_CPUFUNC_H_
|
||||
|
||||
#include <sys/cdefs.h>
|
||||
|
||||
static __inline void
|
||||
outsb(u_int port, const void *addr, size_t cnt)
|
||||
{
|
||||
__asm __volatile("cld; rep; outsb"
|
||||
: "+S" (addr), "+c" (cnt)
|
||||
: "d" (port));
|
||||
}
|
||||
#if defined(__i386__)
|
||||
# include <machine/x86/cpufunc.h>
|
||||
#elif defined(__x86_64__)
|
||||
# include <machine/x86_64/cpufunc.h>
|
||||
#else
|
||||
# error Need a cpufunc.h for this arch!
|
||||
#endif
|
||||
|
||||
#endif /* _FBSD_COMPAT_MACHINE_CPUFUNC_H_ */
|
||||
|
|
|
|||
File diff suppressed because it is too large
Load Diff
|
|
@ -0,0 +1,805 @@
|
|||
/*-
|
||||
* Copyright (c) 1993 The Regents of the University of California.
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* 4. Neither the name of the University nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
|
||||
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
|
||||
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
||||
* SUCH DAMAGE.
|
||||
*
|
||||
* $FreeBSD: releng/11.1/sys/i386/include/cpufunc.h 313148 2017-02-03 12:03:10Z kib $
|
||||
*/
|
||||
|
||||
/*
|
||||
* Functions to provide access to special i386 instructions.
|
||||
* This in included in sys/systm.h, and that file should be
|
||||
* used in preference to this.
|
||||
*/
|
||||
|
||||
#ifndef _MACHINE_CPUFUNC_H_
|
||||
#define _MACHINE_CPUFUNC_H_
|
||||
|
||||
struct region_descriptor;
|
||||
|
||||
#define readb(va) (*(volatile uint8_t *) (va))
|
||||
#define readw(va) (*(volatile uint16_t *) (va))
|
||||
#define readl(va) (*(volatile uint32_t *) (va))
|
||||
|
||||
#define writeb(va, d) (*(volatile uint8_t *) (va) = (d))
|
||||
#define writew(va, d) (*(volatile uint16_t *) (va) = (d))
|
||||
#define writel(va, d) (*(volatile uint32_t *) (va) = (d))
|
||||
|
||||
#if defined(__GNUCLIKE_ASM) && defined(__CC_SUPPORTS___INLINE)
|
||||
|
||||
static __inline void
|
||||
breakpoint(void)
|
||||
{
|
||||
__asm __volatile("int $3");
|
||||
}
|
||||
|
||||
static __inline u_int
|
||||
bsfl(u_int mask)
|
||||
{
|
||||
u_int result;
|
||||
|
||||
__asm("bsfl %1,%0" : "=r" (result) : "rm" (mask) : "cc");
|
||||
return (result);
|
||||
}
|
||||
|
||||
static __inline u_int
|
||||
bsrl(u_int mask)
|
||||
{
|
||||
u_int result;
|
||||
|
||||
__asm("bsrl %1,%0" : "=r" (result) : "rm" (mask) : "cc");
|
||||
return (result);
|
||||
}
|
||||
|
||||
static __inline void
|
||||
clflush(u_long addr)
|
||||
{
|
||||
|
||||
__asm __volatile("clflush %0" : : "m" (*(char *)addr));
|
||||
}
|
||||
|
||||
static __inline void
|
||||
clflushopt(u_long addr)
|
||||
{
|
||||
|
||||
__asm __volatile(".byte 0x66;clflush %0" : : "m" (*(char *)addr));
|
||||
}
|
||||
|
||||
static __inline void
|
||||
clts(void)
|
||||
{
|
||||
|
||||
__asm __volatile("clts");
|
||||
}
|
||||
|
||||
static __inline void
|
||||
disable_intr(void)
|
||||
{
|
||||
|
||||
__asm __volatile("cli" : : : "memory");
|
||||
}
|
||||
|
||||
static __inline void
|
||||
do_cpuid(u_int ax, u_int *p)
|
||||
{
|
||||
__asm __volatile("cpuid"
|
||||
: "=a" (p[0]), "=b" (p[1]), "=c" (p[2]), "=d" (p[3])
|
||||
: "0" (ax));
|
||||
}
|
||||
|
||||
static __inline void
|
||||
cpuid_count(u_int ax, u_int cx, u_int *p)
|
||||
{
|
||||
__asm __volatile("cpuid"
|
||||
: "=a" (p[0]), "=b" (p[1]), "=c" (p[2]), "=d" (p[3])
|
||||
: "0" (ax), "c" (cx));
|
||||
}
|
||||
|
||||
static __inline void
|
||||
enable_intr(void)
|
||||
{
|
||||
|
||||
__asm __volatile("sti");
|
||||
}
|
||||
|
||||
static __inline void
|
||||
cpu_monitor(const void *addr, u_long extensions, u_int hints)
|
||||
{
|
||||
|
||||
__asm __volatile("monitor"
|
||||
: : "a" (addr), "c" (extensions), "d" (hints));
|
||||
}
|
||||
|
||||
static __inline void
|
||||
cpu_mwait(u_long extensions, u_int hints)
|
||||
{
|
||||
|
||||
__asm __volatile("mwait" : : "a" (hints), "c" (extensions));
|
||||
}
|
||||
|
||||
static __inline void
|
||||
lfence(void)
|
||||
{
|
||||
|
||||
__asm __volatile("lfence" : : : "memory");
|
||||
}
|
||||
|
||||
static __inline void
|
||||
mfence(void)
|
||||
{
|
||||
|
||||
__asm __volatile("mfence" : : : "memory");
|
||||
}
|
||||
|
||||
static __inline void
|
||||
sfence(void)
|
||||
{
|
||||
|
||||
__asm __volatile("sfence" : : : "memory");
|
||||
}
|
||||
|
||||
#ifdef _KERNEL
|
||||
|
||||
#ifndef __HAIKU__
|
||||
#define HAVE_INLINE_FFS
|
||||
|
||||
static __inline int
|
||||
ffs(int mask)
|
||||
{
|
||||
/*
|
||||
* Note that gcc-2's builtin ffs would be used if we didn't declare
|
||||
* this inline or turn off the builtin. The builtin is faster but
|
||||
* broken in gcc-2.4.5 and slower but working in gcc-2.5 and later
|
||||
* versions.
|
||||
*/
|
||||
return (mask == 0 ? mask : (int)bsfl((u_int)mask) + 1);
|
||||
}
|
||||
#endif
|
||||
|
||||
#define HAVE_INLINE_FFSL
|
||||
|
||||
static __inline int
|
||||
ffsl(long mask)
|
||||
{
|
||||
return (ffs((int)mask));
|
||||
}
|
||||
|
||||
#define HAVE_INLINE_FLS
|
||||
|
||||
static __inline int
|
||||
fls(int mask)
|
||||
{
|
||||
return (mask == 0 ? mask : (int)bsrl((u_int)mask) + 1);
|
||||
}
|
||||
|
||||
#define HAVE_INLINE_FLSL
|
||||
|
||||
static __inline int
|
||||
flsl(long mask)
|
||||
{
|
||||
return (fls((int)mask));
|
||||
}
|
||||
|
||||
#endif /* _KERNEL */
|
||||
|
||||
static __inline void
|
||||
halt(void)
|
||||
{
|
||||
__asm __volatile("hlt");
|
||||
}
|
||||
|
||||
static __inline u_char
|
||||
inb(u_int port)
|
||||
{
|
||||
u_char data;
|
||||
|
||||
__asm __volatile("inb %w1, %0" : "=a" (data) : "Nd" (port));
|
||||
return (data);
|
||||
}
|
||||
|
||||
static __inline u_int
|
||||
inl(u_int port)
|
||||
{
|
||||
u_int data;
|
||||
|
||||
__asm __volatile("inl %w1, %0" : "=a" (data) : "Nd" (port));
|
||||
return (data);
|
||||
}
|
||||
|
||||
static __inline void
|
||||
insb(u_int port, void *addr, size_t count)
|
||||
{
|
||||
__asm __volatile("cld; rep; insb"
|
||||
: "+D" (addr), "+c" (count)
|
||||
: "d" (port)
|
||||
: "memory");
|
||||
}
|
||||
|
||||
static __inline void
|
||||
insw(u_int port, void *addr, size_t count)
|
||||
{
|
||||
__asm __volatile("cld; rep; insw"
|
||||
: "+D" (addr), "+c" (count)
|
||||
: "d" (port)
|
||||
: "memory");
|
||||
}
|
||||
|
||||
static __inline void
|
||||
insl(u_int port, void *addr, size_t count)
|
||||
{
|
||||
__asm __volatile("cld; rep; insl"
|
||||
: "+D" (addr), "+c" (count)
|
||||
: "d" (port)
|
||||
: "memory");
|
||||
}
|
||||
|
||||
static __inline void
|
||||
invd(void)
|
||||
{
|
||||
__asm __volatile("invd");
|
||||
}
|
||||
|
||||
static __inline u_short
|
||||
inw(u_int port)
|
||||
{
|
||||
u_short data;
|
||||
|
||||
__asm __volatile("inw %w1, %0" : "=a" (data) : "Nd" (port));
|
||||
return (data);
|
||||
}
|
||||
|
||||
static __inline void
|
||||
outb(u_int port, u_char data)
|
||||
{
|
||||
__asm __volatile("outb %0, %w1" : : "a" (data), "Nd" (port));
|
||||
}
|
||||
|
||||
static __inline void
|
||||
outl(u_int port, u_int data)
|
||||
{
|
||||
__asm __volatile("outl %0, %w1" : : "a" (data), "Nd" (port));
|
||||
}
|
||||
|
||||
static __inline void
|
||||
outsb(u_int port, const void *addr, size_t count)
|
||||
{
|
||||
__asm __volatile("cld; rep; outsb"
|
||||
: "+S" (addr), "+c" (count)
|
||||
: "d" (port));
|
||||
}
|
||||
|
||||
static __inline void
|
||||
outsw(u_int port, const void *addr, size_t count)
|
||||
{
|
||||
__asm __volatile("cld; rep; outsw"
|
||||
: "+S" (addr), "+c" (count)
|
||||
: "d" (port));
|
||||
}
|
||||
|
||||
static __inline void
|
||||
outsl(u_int port, const void *addr, size_t count)
|
||||
{
|
||||
__asm __volatile("cld; rep; outsl"
|
||||
: "+S" (addr), "+c" (count)
|
||||
: "d" (port));
|
||||
}
|
||||
|
||||
static __inline void
|
||||
outw(u_int port, u_short data)
|
||||
{
|
||||
__asm __volatile("outw %0, %w1" : : "a" (data), "Nd" (port));
|
||||
}
|
||||
|
||||
static __inline void
|
||||
ia32_pause(void)
|
||||
{
|
||||
__asm __volatile("pause");
|
||||
}
|
||||
|
||||
static __inline u_int
|
||||
read_eflags(void)
|
||||
{
|
||||
u_int ef;
|
||||
|
||||
__asm __volatile("pushfl; popl %0" : "=r" (ef));
|
||||
return (ef);
|
||||
}
|
||||
|
||||
static __inline uint64_t
|
||||
rdmsr(u_int msr)
|
||||
{
|
||||
uint64_t rv;
|
||||
|
||||
__asm __volatile("rdmsr" : "=A" (rv) : "c" (msr));
|
||||
return (rv);
|
||||
}
|
||||
|
||||
static __inline uint32_t
|
||||
rdmsr32(u_int msr)
|
||||
{
|
||||
uint32_t low;
|
||||
|
||||
__asm __volatile("rdmsr" : "=a" (low) : "c" (msr) : "edx");
|
||||
return (low);
|
||||
}
|
||||
|
||||
static __inline uint64_t
|
||||
rdpmc(u_int pmc)
|
||||
{
|
||||
uint64_t rv;
|
||||
|
||||
__asm __volatile("rdpmc" : "=A" (rv) : "c" (pmc));
|
||||
return (rv);
|
||||
}
|
||||
|
||||
static __inline uint64_t
|
||||
rdtsc(void)
|
||||
{
|
||||
uint64_t rv;
|
||||
|
||||
__asm __volatile("rdtsc" : "=A" (rv));
|
||||
return (rv);
|
||||
}
|
||||
|
||||
static __inline uint32_t
|
||||
rdtsc32(void)
|
||||
{
|
||||
uint32_t rv;
|
||||
|
||||
__asm __volatile("rdtsc" : "=a" (rv) : : "edx");
|
||||
return (rv);
|
||||
}
|
||||
|
||||
#ifndef wbinvd
|
||||
static __inline void
|
||||
wbinvd(void)
|
||||
{
|
||||
__asm __volatile("wbinvd");
|
||||
}
|
||||
#endif
|
||||
|
||||
static __inline void
|
||||
write_eflags(u_int ef)
|
||||
{
|
||||
__asm __volatile("pushl %0; popfl" : : "r" (ef));
|
||||
}
|
||||
|
||||
static __inline void
|
||||
wrmsr(u_int msr, uint64_t newval)
|
||||
{
|
||||
__asm __volatile("wrmsr" : : "A" (newval), "c" (msr));
|
||||
}
|
||||
|
||||
static __inline void
|
||||
load_cr0(u_int data)
|
||||
{
|
||||
|
||||
__asm __volatile("movl %0,%%cr0" : : "r" (data));
|
||||
}
|
||||
|
||||
static __inline u_int
|
||||
rcr0(void)
|
||||
{
|
||||
u_int data;
|
||||
|
||||
__asm __volatile("movl %%cr0,%0" : "=r" (data));
|
||||
return (data);
|
||||
}
|
||||
|
||||
static __inline u_int
|
||||
rcr2(void)
|
||||
{
|
||||
u_int data;
|
||||
|
||||
__asm __volatile("movl %%cr2,%0" : "=r" (data));
|
||||
return (data);
|
||||
}
|
||||
|
||||
static __inline void
|
||||
load_cr3(u_int data)
|
||||
{
|
||||
|
||||
__asm __volatile("movl %0,%%cr3" : : "r" (data) : "memory");
|
||||
}
|
||||
|
||||
static __inline u_int
|
||||
rcr3(void)
|
||||
{
|
||||
u_int data;
|
||||
|
||||
__asm __volatile("movl %%cr3,%0" : "=r" (data));
|
||||
return (data);
|
||||
}
|
||||
|
||||
static __inline void
|
||||
load_cr4(u_int data)
|
||||
{
|
||||
__asm __volatile("movl %0,%%cr4" : : "r" (data));
|
||||
}
|
||||
|
||||
static __inline u_int
|
||||
rcr4(void)
|
||||
{
|
||||
u_int data;
|
||||
|
||||
__asm __volatile("movl %%cr4,%0" : "=r" (data));
|
||||
return (data);
|
||||
}
|
||||
|
||||
static __inline uint64_t
|
||||
rxcr(u_int reg)
|
||||
{
|
||||
u_int low, high;
|
||||
|
||||
__asm __volatile("xgetbv" : "=a" (low), "=d" (high) : "c" (reg));
|
||||
return (low | ((uint64_t)high << 32));
|
||||
}
|
||||
|
||||
static __inline void
|
||||
load_xcr(u_int reg, uint64_t val)
|
||||
{
|
||||
u_int low, high;
|
||||
|
||||
low = val;
|
||||
high = val >> 32;
|
||||
__asm __volatile("xsetbv" : : "c" (reg), "a" (low), "d" (high));
|
||||
}
|
||||
|
||||
/*
|
||||
* Global TLB flush (except for thise for pages marked PG_G)
|
||||
*/
|
||||
static __inline void
|
||||
invltlb(void)
|
||||
{
|
||||
|
||||
load_cr3(rcr3());
|
||||
}
|
||||
|
||||
/*
|
||||
* TLB flush for an individual page (even if it has PG_G).
|
||||
* Only works on 486+ CPUs (i386 does not have PG_G).
|
||||
*/
|
||||
static __inline void
|
||||
invlpg(u_int addr)
|
||||
{
|
||||
|
||||
__asm __volatile("invlpg %0" : : "m" (*(char *)addr) : "memory");
|
||||
}
|
||||
|
||||
static __inline u_short
|
||||
rfs(void)
|
||||
{
|
||||
u_short sel;
|
||||
__asm __volatile("movw %%fs,%0" : "=rm" (sel));
|
||||
return (sel);
|
||||
}
|
||||
|
||||
static __inline uint64_t
|
||||
rgdt(void)
|
||||
{
|
||||
uint64_t gdtr;
|
||||
__asm __volatile("sgdt %0" : "=m" (gdtr));
|
||||
return (gdtr);
|
||||
}
|
||||
|
||||
static __inline u_short
|
||||
rgs(void)
|
||||
{
|
||||
u_short sel;
|
||||
__asm __volatile("movw %%gs,%0" : "=rm" (sel));
|
||||
return (sel);
|
||||
}
|
||||
|
||||
static __inline uint64_t
|
||||
ridt(void)
|
||||
{
|
||||
uint64_t idtr;
|
||||
__asm __volatile("sidt %0" : "=m" (idtr));
|
||||
return (idtr);
|
||||
}
|
||||
|
||||
static __inline u_short
|
||||
rldt(void)
|
||||
{
|
||||
u_short ldtr;
|
||||
__asm __volatile("sldt %0" : "=g" (ldtr));
|
||||
return (ldtr);
|
||||
}
|
||||
|
||||
static __inline u_short
|
||||
rss(void)
|
||||
{
|
||||
u_short sel;
|
||||
__asm __volatile("movw %%ss,%0" : "=rm" (sel));
|
||||
return (sel);
|
||||
}
|
||||
|
||||
static __inline u_short
|
||||
rtr(void)
|
||||
{
|
||||
u_short tr;
|
||||
__asm __volatile("str %0" : "=g" (tr));
|
||||
return (tr);
|
||||
}
|
||||
|
||||
static __inline void
|
||||
load_fs(u_short sel)
|
||||
{
|
||||
__asm __volatile("movw %0,%%fs" : : "rm" (sel));
|
||||
}
|
||||
|
||||
static __inline void
|
||||
load_gs(u_short sel)
|
||||
{
|
||||
__asm __volatile("movw %0,%%gs" : : "rm" (sel));
|
||||
}
|
||||
|
||||
static __inline void
|
||||
lidt(struct region_descriptor *addr)
|
||||
{
|
||||
__asm __volatile("lidt (%0)" : : "r" (addr));
|
||||
}
|
||||
|
||||
static __inline void
|
||||
lldt(u_short sel)
|
||||
{
|
||||
__asm __volatile("lldt %0" : : "r" (sel));
|
||||
}
|
||||
|
||||
static __inline void
|
||||
ltr(u_short sel)
|
||||
{
|
||||
__asm __volatile("ltr %0" : : "r" (sel));
|
||||
}
|
||||
|
||||
static __inline u_int
|
||||
rdr0(void)
|
||||
{
|
||||
u_int data;
|
||||
__asm __volatile("movl %%dr0,%0" : "=r" (data));
|
||||
return (data);
|
||||
}
|
||||
|
||||
static __inline void
|
||||
load_dr0(u_int dr0)
|
||||
{
|
||||
__asm __volatile("movl %0,%%dr0" : : "r" (dr0));
|
||||
}
|
||||
|
||||
static __inline u_int
|
||||
rdr1(void)
|
||||
{
|
||||
u_int data;
|
||||
__asm __volatile("movl %%dr1,%0" : "=r" (data));
|
||||
return (data);
|
||||
}
|
||||
|
||||
static __inline void
|
||||
load_dr1(u_int dr1)
|
||||
{
|
||||
__asm __volatile("movl %0,%%dr1" : : "r" (dr1));
|
||||
}
|
||||
|
||||
static __inline u_int
|
||||
rdr2(void)
|
||||
{
|
||||
u_int data;
|
||||
__asm __volatile("movl %%dr2,%0" : "=r" (data));
|
||||
return (data);
|
||||
}
|
||||
|
||||
static __inline void
|
||||
load_dr2(u_int dr2)
|
||||
{
|
||||
__asm __volatile("movl %0,%%dr2" : : "r" (dr2));
|
||||
}
|
||||
|
||||
static __inline u_int
|
||||
rdr3(void)
|
||||
{
|
||||
u_int data;
|
||||
__asm __volatile("movl %%dr3,%0" : "=r" (data));
|
||||
return (data);
|
||||
}
|
||||
|
||||
static __inline void
|
||||
load_dr3(u_int dr3)
|
||||
{
|
||||
__asm __volatile("movl %0,%%dr3" : : "r" (dr3));
|
||||
}
|
||||
|
||||
static __inline u_int
|
||||
rdr4(void)
|
||||
{
|
||||
u_int data;
|
||||
__asm __volatile("movl %%dr4,%0" : "=r" (data));
|
||||
return (data);
|
||||
}
|
||||
|
||||
static __inline void
|
||||
load_dr4(u_int dr4)
|
||||
{
|
||||
__asm __volatile("movl %0,%%dr4" : : "r" (dr4));
|
||||
}
|
||||
|
||||
static __inline u_int
|
||||
rdr5(void)
|
||||
{
|
||||
u_int data;
|
||||
__asm __volatile("movl %%dr5,%0" : "=r" (data));
|
||||
return (data);
|
||||
}
|
||||
|
||||
static __inline void
|
||||
load_dr5(u_int dr5)
|
||||
{
|
||||
__asm __volatile("movl %0,%%dr5" : : "r" (dr5));
|
||||
}
|
||||
|
||||
static __inline u_int
|
||||
rdr6(void)
|
||||
{
|
||||
u_int data;
|
||||
__asm __volatile("movl %%dr6,%0" : "=r" (data));
|
||||
return (data);
|
||||
}
|
||||
|
||||
static __inline void
|
||||
load_dr6(u_int dr6)
|
||||
{
|
||||
__asm __volatile("movl %0,%%dr6" : : "r" (dr6));
|
||||
}
|
||||
|
||||
static __inline u_int
|
||||
rdr7(void)
|
||||
{
|
||||
u_int data;
|
||||
__asm __volatile("movl %%dr7,%0" : "=r" (data));
|
||||
return (data);
|
||||
}
|
||||
|
||||
static __inline void
|
||||
load_dr7(u_int dr7)
|
||||
{
|
||||
__asm __volatile("movl %0,%%dr7" : : "r" (dr7));
|
||||
}
|
||||
|
||||
static __inline u_char
|
||||
read_cyrix_reg(u_char reg)
|
||||
{
|
||||
outb(0x22, reg);
|
||||
return inb(0x23);
|
||||
}
|
||||
|
||||
static __inline void
|
||||
write_cyrix_reg(u_char reg, u_char data)
|
||||
{
|
||||
outb(0x22, reg);
|
||||
outb(0x23, data);
|
||||
}
|
||||
|
||||
#ifndef __HAIKU__
|
||||
static __inline register_t
|
||||
intr_disable(void)
|
||||
{
|
||||
register_t eflags;
|
||||
|
||||
eflags = read_eflags();
|
||||
disable_intr();
|
||||
return (eflags);
|
||||
}
|
||||
|
||||
static __inline void
|
||||
intr_restore(register_t eflags)
|
||||
{
|
||||
write_eflags(eflags);
|
||||
}
|
||||
#endif
|
||||
|
||||
#else /* !(__GNUCLIKE_ASM && __CC_SUPPORTS___INLINE) */
|
||||
|
||||
int breakpoint(void);
|
||||
u_int bsfl(u_int mask);
|
||||
u_int bsrl(u_int mask);
|
||||
void clflush(u_long addr);
|
||||
void clts(void);
|
||||
void cpuid_count(u_int ax, u_int cx, u_int *p);
|
||||
void disable_intr(void);
|
||||
void do_cpuid(u_int ax, u_int *p);
|
||||
void enable_intr(void);
|
||||
void halt(void);
|
||||
void ia32_pause(void);
|
||||
u_char inb(u_int port);
|
||||
u_int inl(u_int port);
|
||||
void insb(u_int port, void *addr, size_t count);
|
||||
void insl(u_int port, void *addr, size_t count);
|
||||
void insw(u_int port, void *addr, size_t count);
|
||||
register_t intr_disable(void);
|
||||
void intr_restore(register_t ef);
|
||||
void invd(void);
|
||||
void invlpg(u_int addr);
|
||||
void invltlb(void);
|
||||
u_short inw(u_int port);
|
||||
void lidt(struct region_descriptor *addr);
|
||||
void lldt(u_short sel);
|
||||
void load_cr0(u_int cr0);
|
||||
void load_cr3(u_int cr3);
|
||||
void load_cr4(u_int cr4);
|
||||
void load_dr0(u_int dr0);
|
||||
void load_dr1(u_int dr1);
|
||||
void load_dr2(u_int dr2);
|
||||
void load_dr3(u_int dr3);
|
||||
void load_dr4(u_int dr4);
|
||||
void load_dr5(u_int dr5);
|
||||
void load_dr6(u_int dr6);
|
||||
void load_dr7(u_int dr7);
|
||||
void load_fs(u_short sel);
|
||||
void load_gs(u_short sel);
|
||||
void ltr(u_short sel);
|
||||
void outb(u_int port, u_char data);
|
||||
void outl(u_int port, u_int data);
|
||||
void outsb(u_int port, const void *addr, size_t count);
|
||||
void outsl(u_int port, const void *addr, size_t count);
|
||||
void outsw(u_int port, const void *addr, size_t count);
|
||||
void outw(u_int port, u_short data);
|
||||
u_int rcr0(void);
|
||||
u_int rcr2(void);
|
||||
u_int rcr3(void);
|
||||
u_int rcr4(void);
|
||||
uint64_t rdmsr(u_int msr);
|
||||
uint64_t rdpmc(u_int pmc);
|
||||
u_int rdr0(void);
|
||||
u_int rdr1(void);
|
||||
u_int rdr2(void);
|
||||
u_int rdr3(void);
|
||||
u_int rdr4(void);
|
||||
u_int rdr5(void);
|
||||
u_int rdr6(void);
|
||||
u_int rdr7(void);
|
||||
uint64_t rdtsc(void);
|
||||
u_char read_cyrix_reg(u_char reg);
|
||||
u_int read_eflags(void);
|
||||
u_int rfs(void);
|
||||
uint64_t rgdt(void);
|
||||
u_int rgs(void);
|
||||
uint64_t ridt(void);
|
||||
u_short rldt(void);
|
||||
u_short rtr(void);
|
||||
void wbinvd(void);
|
||||
void write_cyrix_reg(u_char reg, u_char data);
|
||||
void write_eflags(u_int ef);
|
||||
void wrmsr(u_int msr, uint64_t newval);
|
||||
|
||||
#endif /* __GNUCLIKE_ASM && __CC_SUPPORTS___INLINE */
|
||||
|
||||
void reset_dbregs(void);
|
||||
|
||||
#ifdef _KERNEL
|
||||
int rdmsr_safe(u_int msr, uint64_t *val);
|
||||
int wrmsr_safe(u_int msr, uint64_t newval);
|
||||
#endif
|
||||
|
||||
#endif /* !_MACHINE_CPUFUNC_H_ */
|
||||
|
|
@ -0,0 +1,911 @@
|
|||
/*-
|
||||
* Copyright (c) 2003 Peter Wemm.
|
||||
* Copyright (c) 1993 The Regents of the University of California.
|
||||
* All rights reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions
|
||||
* are met:
|
||||
* 1. Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* 2. Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* 4. Neither the name of the University nor the names of its contributors
|
||||
* may be used to endorse or promote products derived from this software
|
||||
* without specific prior written permission.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
|
||||
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
|
||||
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
|
||||
* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
|
||||
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
|
||||
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
|
||||
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
|
||||
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
|
||||
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
|
||||
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
|
||||
* SUCH DAMAGE.
|
||||
*
|
||||
* $FreeBSD: releng/11.1/sys/amd64/include/cpufunc.h 313148 2017-02-03 12:03:10Z kib $
|
||||
*/
|
||||
|
||||
/*
|
||||
* Functions to provide access to special i386 instructions.
|
||||
* This in included in sys/systm.h, and that file should be
|
||||
* used in preference to this.
|
||||
*/
|
||||
|
||||
#ifndef _MACHINE_CPUFUNC_H_
|
||||
#define _MACHINE_CPUFUNC_H_
|
||||
|
||||
struct region_descriptor;
|
||||
|
||||
#define readb(va) (*(volatile uint8_t *) (va))
|
||||
#define readw(va) (*(volatile uint16_t *) (va))
|
||||
#define readl(va) (*(volatile uint32_t *) (va))
|
||||
#define readq(va) (*(volatile uint64_t *) (va))
|
||||
|
||||
#define writeb(va, d) (*(volatile uint8_t *) (va) = (d))
|
||||
#define writew(va, d) (*(volatile uint16_t *) (va) = (d))
|
||||
#define writel(va, d) (*(volatile uint32_t *) (va) = (d))
|
||||
#define writeq(va, d) (*(volatile uint64_t *) (va) = (d))
|
||||
|
||||
#if defined(__GNUCLIKE_ASM) && defined(__CC_SUPPORTS___INLINE)
|
||||
|
||||
static __inline void
|
||||
breakpoint(void)
|
||||
{
|
||||
__asm __volatile("int $3");
|
||||
}
|
||||
|
||||
static __inline u_int
|
||||
bsfl(u_int mask)
|
||||
{
|
||||
u_int result;
|
||||
|
||||
__asm __volatile("bsfl %1,%0" : "=r" (result) : "rm" (mask));
|
||||
return (result);
|
||||
}
|
||||
|
||||
static __inline u_long
|
||||
bsfq(u_long mask)
|
||||
{
|
||||
u_long result;
|
||||
|
||||
__asm __volatile("bsfq %1,%0" : "=r" (result) : "rm" (mask));
|
||||
return (result);
|
||||
}
|
||||
|
||||
static __inline u_int
|
||||
bsrl(u_int mask)
|
||||
{
|
||||
u_int result;
|
||||
|
||||
__asm __volatile("bsrl %1,%0" : "=r" (result) : "rm" (mask));
|
||||
return (result);
|
||||
}
|
||||
|
||||
static __inline u_long
|
||||
bsrq(u_long mask)
|
||||
{
|
||||
u_long result;
|
||||
|
||||
__asm __volatile("bsrq %1,%0" : "=r" (result) : "rm" (mask));
|
||||
return (result);
|
||||
}
|
||||
|
||||
static __inline void
|
||||
clflush(u_long addr)
|
||||
{
|
||||
|
||||
__asm __volatile("clflush %0" : : "m" (*(char *)addr));
|
||||
}
|
||||
|
||||
static __inline void
|
||||
clflushopt(u_long addr)
|
||||
{
|
||||
|
||||
__asm __volatile(".byte 0x66;clflush %0" : : "m" (*(char *)addr));
|
||||
}
|
||||
|
||||
static __inline void
|
||||
clts(void)
|
||||
{
|
||||
|
||||
__asm __volatile("clts");
|
||||
}
|
||||
|
||||
static __inline void
|
||||
disable_intr(void)
|
||||
{
|
||||
__asm __volatile("cli" : : : "memory");
|
||||
}
|
||||
|
||||
static __inline void
|
||||
do_cpuid(u_int ax, u_int *p)
|
||||
{
|
||||
__asm __volatile("cpuid"
|
||||
: "=a" (p[0]), "=b" (p[1]), "=c" (p[2]), "=d" (p[3])
|
||||
: "0" (ax));
|
||||
}
|
||||
|
||||
static __inline void
|
||||
cpuid_count(u_int ax, u_int cx, u_int *p)
|
||||
{
|
||||
__asm __volatile("cpuid"
|
||||
: "=a" (p[0]), "=b" (p[1]), "=c" (p[2]), "=d" (p[3])
|
||||
: "0" (ax), "c" (cx));
|
||||
}
|
||||
|
||||
static __inline void
|
||||
enable_intr(void)
|
||||
{
|
||||
__asm __volatile("sti");
|
||||
}
|
||||
|
||||
#ifdef _KERNEL
|
||||
|
||||
#define HAVE_INLINE_FFS
|
||||
#define ffs(x) __builtin_ffs(x)
|
||||
|
||||
#define HAVE_INLINE_FFSL
|
||||
|
||||
static __inline int
|
||||
ffsl(long mask)
|
||||
{
|
||||
return (mask == 0 ? mask : (int)bsfq((u_long)mask) + 1);
|
||||
}
|
||||
|
||||
#define HAVE_INLINE_FFSLL
|
||||
|
||||
static __inline int
|
||||
ffsll(long long mask)
|
||||
{
|
||||
return (ffsl((long)mask));
|
||||
}
|
||||
|
||||
#define HAVE_INLINE_FLS
|
||||
|
||||
static __inline int
|
||||
fls(int mask)
|
||||
{
|
||||
return (mask == 0 ? mask : (int)bsrl((u_int)mask) + 1);
|
||||
}
|
||||
|
||||
#define HAVE_INLINE_FLSL
|
||||
|
||||
static __inline int
|
||||
flsl(long mask)
|
||||
{
|
||||
return (mask == 0 ? mask : (int)bsrq((u_long)mask) + 1);
|
||||
}
|
||||
|
||||
#define HAVE_INLINE_FLSLL
|
||||
|
||||
static __inline int
|
||||
flsll(long long mask)
|
||||
{
|
||||
return (flsl((long)mask));
|
||||
}
|
||||
|
||||
#endif /* _KERNEL */
|
||||
|
||||
static __inline void
|
||||
halt(void)
|
||||
{
|
||||
__asm __volatile("hlt");
|
||||
}
|
||||
|
||||
static __inline u_char
|
||||
inb(u_int port)
|
||||
{
|
||||
u_char data;
|
||||
|
||||
__asm __volatile("inb %w1, %0" : "=a" (data) : "Nd" (port));
|
||||
return (data);
|
||||
}
|
||||
|
||||
static __inline u_int
|
||||
inl(u_int port)
|
||||
{
|
||||
u_int data;
|
||||
|
||||
__asm __volatile("inl %w1, %0" : "=a" (data) : "Nd" (port));
|
||||
return (data);
|
||||
}
|
||||
|
||||
static __inline void
|
||||
insb(u_int port, void *addr, size_t count)
|
||||
{
|
||||
__asm __volatile("cld; rep; insb"
|
||||
: "+D" (addr), "+c" (count)
|
||||
: "d" (port)
|
||||
: "memory");
|
||||
}
|
||||
|
||||
static __inline void
|
||||
insw(u_int port, void *addr, size_t count)
|
||||
{
|
||||
__asm __volatile("cld; rep; insw"
|
||||
: "+D" (addr), "+c" (count)
|
||||
: "d" (port)
|
||||
: "memory");
|
||||
}
|
||||
|
||||
static __inline void
|
||||
insl(u_int port, void *addr, size_t count)
|
||||
{
|
||||
__asm __volatile("cld; rep; insl"
|
||||
: "+D" (addr), "+c" (count)
|
||||
: "d" (port)
|
||||
: "memory");
|
||||
}
|
||||
|
||||
static __inline void
|
||||
invd(void)
|
||||
{
|
||||
__asm __volatile("invd");
|
||||
}
|
||||
|
||||
static __inline u_short
|
||||
inw(u_int port)
|
||||
{
|
||||
u_short data;
|
||||
|
||||
__asm __volatile("inw %w1, %0" : "=a" (data) : "Nd" (port));
|
||||
return (data);
|
||||
}
|
||||
|
||||
static __inline void
|
||||
outb(u_int port, u_char data)
|
||||
{
|
||||
__asm __volatile("outb %0, %w1" : : "a" (data), "Nd" (port));
|
||||
}
|
||||
|
||||
static __inline void
|
||||
outl(u_int port, u_int data)
|
||||
{
|
||||
__asm __volatile("outl %0, %w1" : : "a" (data), "Nd" (port));
|
||||
}
|
||||
|
||||
static __inline void
|
||||
outsb(u_int port, const void *addr, size_t count)
|
||||
{
|
||||
__asm __volatile("cld; rep; outsb"
|
||||
: "+S" (addr), "+c" (count)
|
||||
: "d" (port));
|
||||
}
|
||||
|
||||
static __inline void
|
||||
outsw(u_int port, const void *addr, size_t count)
|
||||
{
|
||||
__asm __volatile("cld; rep; outsw"
|
||||
: "+S" (addr), "+c" (count)
|
||||
: "d" (port));
|
||||
}
|
||||
|
||||
static __inline void
|
||||
outsl(u_int port, const void *addr, size_t count)
|
||||
{
|
||||
__asm __volatile("cld; rep; outsl"
|
||||
: "+S" (addr), "+c" (count)
|
||||
: "d" (port));
|
||||
}
|
||||
|
||||
static __inline void
|
||||
outw(u_int port, u_short data)
|
||||
{
|
||||
__asm __volatile("outw %0, %w1" : : "a" (data), "Nd" (port));
|
||||
}
|
||||
|
||||
static __inline u_long
|
||||
popcntq(u_long mask)
|
||||
{
|
||||
u_long result;
|
||||
|
||||
__asm __volatile("popcntq %1,%0" : "=r" (result) : "rm" (mask));
|
||||
return (result);
|
||||
}
|
||||
|
||||
static __inline void
|
||||
lfence(void)
|
||||
{
|
||||
|
||||
__asm __volatile("lfence" : : : "memory");
|
||||
}
|
||||
|
||||
static __inline void
|
||||
mfence(void)
|
||||
{
|
||||
|
||||
__asm __volatile("mfence" : : : "memory");
|
||||
}
|
||||
|
||||
static __inline void
|
||||
sfence(void)
|
||||
{
|
||||
|
||||
__asm __volatile("sfence" : : : "memory");
|
||||
}
|
||||
|
||||
static __inline void
|
||||
ia32_pause(void)
|
||||
{
|
||||
__asm __volatile("pause");
|
||||
}
|
||||
|
||||
static __inline u_long
|
||||
read_rflags(void)
|
||||
{
|
||||
u_long rf;
|
||||
|
||||
__asm __volatile("pushfq; popq %0" : "=r" (rf));
|
||||
return (rf);
|
||||
}
|
||||
|
||||
static __inline uint64_t
|
||||
rdmsr(u_int msr)
|
||||
{
|
||||
uint32_t low, high;
|
||||
|
||||
__asm __volatile("rdmsr" : "=a" (low), "=d" (high) : "c" (msr));
|
||||
return (low | ((uint64_t)high << 32));
|
||||
}
|
||||
|
||||
static __inline uint32_t
|
||||
rdmsr32(u_int msr)
|
||||
{
|
||||
uint32_t low;
|
||||
|
||||
__asm __volatile("rdmsr" : "=a" (low) : "c" (msr) : "rdx");
|
||||
return (low);
|
||||
}
|
||||
|
||||
static __inline uint64_t
|
||||
rdpmc(u_int pmc)
|
||||
{
|
||||
uint32_t low, high;
|
||||
|
||||
__asm __volatile("rdpmc" : "=a" (low), "=d" (high) : "c" (pmc));
|
||||
return (low | ((uint64_t)high << 32));
|
||||
}
|
||||
|
||||
static __inline uint64_t
|
||||
rdtsc(void)
|
||||
{
|
||||
uint32_t low, high;
|
||||
|
||||
__asm __volatile("rdtsc" : "=a" (low), "=d" (high));
|
||||
return (low | ((uint64_t)high << 32));
|
||||
}
|
||||
|
||||
static __inline uint32_t
|
||||
rdtsc32(void)
|
||||
{
|
||||
uint32_t rv;
|
||||
|
||||
__asm __volatile("rdtsc" : "=a" (rv) : : "edx");
|
||||
return (rv);
|
||||
}
|
||||
|
||||
#ifndef wbinvd
|
||||
static __inline void
|
||||
wbinvd(void)
|
||||
{
|
||||
__asm __volatile("wbinvd");
|
||||
}
|
||||
#endif
|
||||
|
||||
static __inline void
|
||||
write_rflags(u_long rf)
|
||||
{
|
||||
__asm __volatile("pushq %0; popfq" : : "r" (rf));
|
||||
}
|
||||
|
||||
static __inline void
|
||||
wrmsr(u_int msr, uint64_t newval)
|
||||
{
|
||||
uint32_t low, high;
|
||||
|
||||
low = newval;
|
||||
high = newval >> 32;
|
||||
__asm __volatile("wrmsr" : : "a" (low), "d" (high), "c" (msr));
|
||||
}
|
||||
|
||||
static __inline void
|
||||
load_cr0(u_long data)
|
||||
{
|
||||
|
||||
__asm __volatile("movq %0,%%cr0" : : "r" (data));
|
||||
}
|
||||
|
||||
static __inline u_long
|
||||
rcr0(void)
|
||||
{
|
||||
u_long data;
|
||||
|
||||
__asm __volatile("movq %%cr0,%0" : "=r" (data));
|
||||
return (data);
|
||||
}
|
||||
|
||||
static __inline u_long
|
||||
rcr2(void)
|
||||
{
|
||||
u_long data;
|
||||
|
||||
__asm __volatile("movq %%cr2,%0" : "=r" (data));
|
||||
return (data);
|
||||
}
|
||||
|
||||
static __inline void
|
||||
load_cr3(u_long data)
|
||||
{
|
||||
|
||||
__asm __volatile("movq %0,%%cr3" : : "r" (data) : "memory");
|
||||
}
|
||||
|
||||
static __inline u_long
|
||||
rcr3(void)
|
||||
{
|
||||
u_long data;
|
||||
|
||||
__asm __volatile("movq %%cr3,%0" : "=r" (data));
|
||||
return (data);
|
||||
}
|
||||
|
||||
static __inline void
|
||||
load_cr4(u_long data)
|
||||
{
|
||||
__asm __volatile("movq %0,%%cr4" : : "r" (data));
|
||||
}
|
||||
|
||||
static __inline u_long
|
||||
rcr4(void)
|
||||
{
|
||||
u_long data;
|
||||
|
||||
__asm __volatile("movq %%cr4,%0" : "=r" (data));
|
||||
return (data);
|
||||
}
|
||||
|
||||
static __inline u_long
|
||||
rxcr(u_int reg)
|
||||
{
|
||||
u_int low, high;
|
||||
|
||||
__asm __volatile("xgetbv" : "=a" (low), "=d" (high) : "c" (reg));
|
||||
return (low | ((uint64_t)high << 32));
|
||||
}
|
||||
|
||||
static __inline void
|
||||
load_xcr(u_int reg, u_long val)
|
||||
{
|
||||
u_int low, high;
|
||||
|
||||
low = val;
|
||||
high = val >> 32;
|
||||
__asm __volatile("xsetbv" : : "c" (reg), "a" (low), "d" (high));
|
||||
}
|
||||
|
||||
/*
|
||||
* Global TLB flush (except for thise for pages marked PG_G)
|
||||
*/
|
||||
static __inline void
|
||||
invltlb(void)
|
||||
{
|
||||
|
||||
load_cr3(rcr3());
|
||||
}
|
||||
|
||||
#ifndef CR4_PGE
|
||||
#define CR4_PGE 0x00000080 /* Page global enable */
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Perform the guaranteed invalidation of all TLB entries. This
|
||||
* includes the global entries, and entries in all PCIDs, not only the
|
||||
* current context. The function works both on non-PCID CPUs and CPUs
|
||||
* with the PCID turned off or on. See IA-32 SDM Vol. 3a 4.10.4.1
|
||||
* Operations that Invalidate TLBs and Paging-Structure Caches.
|
||||
*/
|
||||
static __inline void
|
||||
invltlb_glob(void)
|
||||
{
|
||||
uint64_t cr4;
|
||||
|
||||
cr4 = rcr4();
|
||||
load_cr4(cr4 & ~CR4_PGE);
|
||||
/*
|
||||
* Although preemption at this point could be detrimental to
|
||||
* performance, it would not lead to an error. PG_G is simply
|
||||
* ignored if CR4.PGE is clear. Moreover, in case this block
|
||||
* is re-entered, the load_cr4() either above or below will
|
||||
* modify CR4.PGE flushing the TLB.
|
||||
*/
|
||||
load_cr4(cr4 | CR4_PGE);
|
||||
}
|
||||
|
||||
/*
|
||||
* TLB flush for an individual page (even if it has PG_G).
|
||||
* Only works on 486+ CPUs (i386 does not have PG_G).
|
||||
*/
|
||||
static __inline void
|
||||
invlpg(u_long addr)
|
||||
{
|
||||
|
||||
__asm __volatile("invlpg %0" : : "m" (*(char *)addr) : "memory");
|
||||
}
|
||||
|
||||
#define INVPCID_ADDR 0
|
||||
#define INVPCID_CTX 1
|
||||
#define INVPCID_CTXGLOB 2
|
||||
#define INVPCID_ALLCTX 3
|
||||
|
||||
struct invpcid_descr {
|
||||
uint64_t pcid:12 __packed;
|
||||
uint64_t pad:52 __packed;
|
||||
uint64_t addr;
|
||||
} __packed;
|
||||
|
||||
static __inline void
|
||||
invpcid(struct invpcid_descr *d, int type)
|
||||
{
|
||||
|
||||
__asm __volatile("invpcid (%0),%1"
|
||||
: : "r" (d), "r" ((u_long)type) : "memory");
|
||||
}
|
||||
|
||||
static __inline u_short
|
||||
rfs(void)
|
||||
{
|
||||
u_short sel;
|
||||
__asm __volatile("movw %%fs,%0" : "=rm" (sel));
|
||||
return (sel);
|
||||
}
|
||||
|
||||
static __inline u_short
|
||||
rgs(void)
|
||||
{
|
||||
u_short sel;
|
||||
__asm __volatile("movw %%gs,%0" : "=rm" (sel));
|
||||
return (sel);
|
||||
}
|
||||
|
||||
static __inline u_short
|
||||
rss(void)
|
||||
{
|
||||
u_short sel;
|
||||
__asm __volatile("movw %%ss,%0" : "=rm" (sel));
|
||||
return (sel);
|
||||
}
|
||||
|
||||
static __inline void
|
||||
load_ds(u_short sel)
|
||||
{
|
||||
__asm __volatile("movw %0,%%ds" : : "rm" (sel));
|
||||
}
|
||||
|
||||
static __inline void
|
||||
load_es(u_short sel)
|
||||
{
|
||||
__asm __volatile("movw %0,%%es" : : "rm" (sel));
|
||||
}
|
||||
|
||||
static __inline void
|
||||
cpu_monitor(const void *addr, u_long extensions, u_int hints)
|
||||
{
|
||||
|
||||
__asm __volatile("monitor"
|
||||
: : "a" (addr), "c" (extensions), "d" (hints));
|
||||
}
|
||||
|
||||
static __inline void
|
||||
cpu_mwait(u_long extensions, u_int hints)
|
||||
{
|
||||
|
||||
__asm __volatile("mwait" : : "a" (hints), "c" (extensions));
|
||||
}
|
||||
|
||||
#ifdef _KERNEL
|
||||
/* This is defined in <machine/specialreg.h> but is too painful to get to */
|
||||
#ifndef MSR_FSBASE
|
||||
#define MSR_FSBASE 0xc0000100
|
||||
#endif
|
||||
static __inline void
|
||||
load_fs(u_short sel)
|
||||
{
|
||||
/* Preserve the fsbase value across the selector load */
|
||||
__asm __volatile("rdmsr; movw %0,%%fs; wrmsr"
|
||||
: : "rm" (sel), "c" (MSR_FSBASE) : "eax", "edx");
|
||||
}
|
||||
|
||||
#ifndef MSR_GSBASE
|
||||
#define MSR_GSBASE 0xc0000101
|
||||
#endif
|
||||
static __inline void
|
||||
load_gs(u_short sel)
|
||||
{
|
||||
/*
|
||||
* Preserve the gsbase value across the selector load.
|
||||
* Note that we have to disable interrupts because the gsbase
|
||||
* being trashed happens to be the kernel gsbase at the time.
|
||||
*/
|
||||
__asm __volatile("pushfq; cli; rdmsr; movw %0,%%gs; wrmsr; popfq"
|
||||
: : "rm" (sel), "c" (MSR_GSBASE) : "eax", "edx");
|
||||
}
|
||||
#else
|
||||
/* Usable by userland */
|
||||
static __inline void
|
||||
load_fs(u_short sel)
|
||||
{
|
||||
__asm __volatile("movw %0,%%fs" : : "rm" (sel));
|
||||
}
|
||||
|
||||
static __inline void
|
||||
load_gs(u_short sel)
|
||||
{
|
||||
__asm __volatile("movw %0,%%gs" : : "rm" (sel));
|
||||
}
|
||||
#endif
|
||||
|
||||
static __inline void
|
||||
bare_lgdt(struct region_descriptor *addr)
|
||||
{
|
||||
__asm __volatile("lgdt (%0)" : : "r" (addr));
|
||||
}
|
||||
|
||||
static __inline void
|
||||
sgdt(struct region_descriptor *addr)
|
||||
{
|
||||
char *loc;
|
||||
|
||||
loc = (char *)addr;
|
||||
__asm __volatile("sgdt %0" : "=m" (*loc) : : "memory");
|
||||
}
|
||||
|
||||
static __inline void
|
||||
lidt(struct region_descriptor *addr)
|
||||
{
|
||||
__asm __volatile("lidt (%0)" : : "r" (addr));
|
||||
}
|
||||
|
||||
static __inline void
|
||||
sidt(struct region_descriptor *addr)
|
||||
{
|
||||
char *loc;
|
||||
|
||||
loc = (char *)addr;
|
||||
__asm __volatile("sidt %0" : "=m" (*loc) : : "memory");
|
||||
}
|
||||
|
||||
static __inline void
|
||||
lldt(u_short sel)
|
||||
{
|
||||
__asm __volatile("lldt %0" : : "r" (sel));
|
||||
}
|
||||
|
||||
static __inline void
|
||||
ltr(u_short sel)
|
||||
{
|
||||
__asm __volatile("ltr %0" : : "r" (sel));
|
||||
}
|
||||
|
||||
static __inline uint32_t
|
||||
read_tr(void)
|
||||
{
|
||||
u_short sel;
|
||||
|
||||
__asm __volatile("str %0" : "=r" (sel));
|
||||
return (sel);
|
||||
}
|
||||
|
||||
static __inline uint64_t
|
||||
rdr0(void)
|
||||
{
|
||||
uint64_t data;
|
||||
__asm __volatile("movq %%dr0,%0" : "=r" (data));
|
||||
return (data);
|
||||
}
|
||||
|
||||
static __inline void
|
||||
load_dr0(uint64_t dr0)
|
||||
{
|
||||
__asm __volatile("movq %0,%%dr0" : : "r" (dr0));
|
||||
}
|
||||
|
||||
static __inline uint64_t
|
||||
rdr1(void)
|
||||
{
|
||||
uint64_t data;
|
||||
__asm __volatile("movq %%dr1,%0" : "=r" (data));
|
||||
return (data);
|
||||
}
|
||||
|
||||
static __inline void
|
||||
load_dr1(uint64_t dr1)
|
||||
{
|
||||
__asm __volatile("movq %0,%%dr1" : : "r" (dr1));
|
||||
}
|
||||
|
||||
static __inline uint64_t
|
||||
rdr2(void)
|
||||
{
|
||||
uint64_t data;
|
||||
__asm __volatile("movq %%dr2,%0" : "=r" (data));
|
||||
return (data);
|
||||
}
|
||||
|
||||
static __inline void
|
||||
load_dr2(uint64_t dr2)
|
||||
{
|
||||
__asm __volatile("movq %0,%%dr2" : : "r" (dr2));
|
||||
}
|
||||
|
||||
static __inline uint64_t
|
||||
rdr3(void)
|
||||
{
|
||||
uint64_t data;
|
||||
__asm __volatile("movq %%dr3,%0" : "=r" (data));
|
||||
return (data);
|
||||
}
|
||||
|
||||
static __inline void
|
||||
load_dr3(uint64_t dr3)
|
||||
{
|
||||
__asm __volatile("movq %0,%%dr3" : : "r" (dr3));
|
||||
}
|
||||
|
||||
static __inline uint64_t
|
||||
rdr4(void)
|
||||
{
|
||||
uint64_t data;
|
||||
__asm __volatile("movq %%dr4,%0" : "=r" (data));
|
||||
return (data);
|
||||
}
|
||||
|
||||
static __inline void
|
||||
load_dr4(uint64_t dr4)
|
||||
{
|
||||
__asm __volatile("movq %0,%%dr4" : : "r" (dr4));
|
||||
}
|
||||
|
||||
static __inline uint64_t
|
||||
rdr5(void)
|
||||
{
|
||||
uint64_t data;
|
||||
__asm __volatile("movq %%dr5,%0" : "=r" (data));
|
||||
return (data);
|
||||
}
|
||||
|
||||
static __inline void
|
||||
load_dr5(uint64_t dr5)
|
||||
{
|
||||
__asm __volatile("movq %0,%%dr5" : : "r" (dr5));
|
||||
}
|
||||
|
||||
static __inline uint64_t
|
||||
rdr6(void)
|
||||
{
|
||||
uint64_t data;
|
||||
__asm __volatile("movq %%dr6,%0" : "=r" (data));
|
||||
return (data);
|
||||
}
|
||||
|
||||
static __inline void
|
||||
load_dr6(uint64_t dr6)
|
||||
{
|
||||
__asm __volatile("movq %0,%%dr6" : : "r" (dr6));
|
||||
}
|
||||
|
||||
static __inline uint64_t
|
||||
rdr7(void)
|
||||
{
|
||||
uint64_t data;
|
||||
__asm __volatile("movq %%dr7,%0" : "=r" (data));
|
||||
return (data);
|
||||
}
|
||||
|
||||
static __inline void
|
||||
load_dr7(uint64_t dr7)
|
||||
{
|
||||
__asm __volatile("movq %0,%%dr7" : : "r" (dr7));
|
||||
}
|
||||
|
||||
#ifndef __HAIKU__
|
||||
static __inline register_t
|
||||
intr_disable(void)
|
||||
{
|
||||
register_t rflags;
|
||||
|
||||
rflags = read_rflags();
|
||||
disable_intr();
|
||||
return (rflags);
|
||||
}
|
||||
|
||||
static __inline void
|
||||
intr_restore(register_t rflags)
|
||||
{
|
||||
write_rflags(rflags);
|
||||
}
|
||||
#endif
|
||||
|
||||
#else /* !(__GNUCLIKE_ASM && __CC_SUPPORTS___INLINE) */
|
||||
|
||||
int breakpoint(void);
|
||||
u_int bsfl(u_int mask);
|
||||
u_int bsrl(u_int mask);
|
||||
void clflush(u_long addr);
|
||||
void clts(void);
|
||||
void cpuid_count(u_int ax, u_int cx, u_int *p);
|
||||
void disable_intr(void);
|
||||
void do_cpuid(u_int ax, u_int *p);
|
||||
void enable_intr(void);
|
||||
void halt(void);
|
||||
void ia32_pause(void);
|
||||
u_char inb(u_int port);
|
||||
u_int inl(u_int port);
|
||||
void insb(u_int port, void *addr, size_t count);
|
||||
void insl(u_int port, void *addr, size_t count);
|
||||
void insw(u_int port, void *addr, size_t count);
|
||||
register_t intr_disable(void);
|
||||
void intr_restore(register_t rf);
|
||||
void invd(void);
|
||||
void invlpg(u_int addr);
|
||||
void invltlb(void);
|
||||
u_short inw(u_int port);
|
||||
void lidt(struct region_descriptor *addr);
|
||||
void lldt(u_short sel);
|
||||
void load_cr0(u_long cr0);
|
||||
void load_cr3(u_long cr3);
|
||||
void load_cr4(u_long cr4);
|
||||
void load_dr0(uint64_t dr0);
|
||||
void load_dr1(uint64_t dr1);
|
||||
void load_dr2(uint64_t dr2);
|
||||
void load_dr3(uint64_t dr3);
|
||||
void load_dr4(uint64_t dr4);
|
||||
void load_dr5(uint64_t dr5);
|
||||
void load_dr6(uint64_t dr6);
|
||||
void load_dr7(uint64_t dr7);
|
||||
void load_fs(u_short sel);
|
||||
void load_gs(u_short sel);
|
||||
void ltr(u_short sel);
|
||||
void outb(u_int port, u_char data);
|
||||
void outl(u_int port, u_int data);
|
||||
void outsb(u_int port, const void *addr, size_t count);
|
||||
void outsl(u_int port, const void *addr, size_t count);
|
||||
void outsw(u_int port, const void *addr, size_t count);
|
||||
void outw(u_int port, u_short data);
|
||||
u_long rcr0(void);
|
||||
u_long rcr2(void);
|
||||
u_long rcr3(void);
|
||||
u_long rcr4(void);
|
||||
uint64_t rdmsr(u_int msr);
|
||||
uint32_t rdmsr32(u_int msr);
|
||||
uint64_t rdpmc(u_int pmc);
|
||||
uint64_t rdr0(void);
|
||||
uint64_t rdr1(void);
|
||||
uint64_t rdr2(void);
|
||||
uint64_t rdr3(void);
|
||||
uint64_t rdr4(void);
|
||||
uint64_t rdr5(void);
|
||||
uint64_t rdr6(void);
|
||||
uint64_t rdr7(void);
|
||||
uint64_t rdtsc(void);
|
||||
u_long read_rflags(void);
|
||||
u_int rfs(void);
|
||||
u_int rgs(void);
|
||||
void wbinvd(void);
|
||||
void write_rflags(u_int rf);
|
||||
void wrmsr(u_int msr, uint64_t newval);
|
||||
|
||||
#endif /* __GNUCLIKE_ASM && __CC_SUPPORTS___INLINE */
|
||||
|
||||
void reset_dbregs(void);
|
||||
|
||||
#ifdef _KERNEL
|
||||
int rdmsr_safe(u_int msr, uint64_t *val);
|
||||
int wrmsr_safe(u_int msr, uint64_t newval);
|
||||
#endif
|
||||
|
||||
#endif /* !_MACHINE_CPUFUNC_H_ */
|
||||
|
|
@ -85,6 +85,13 @@
|
|||
# define __GNUC_VA_LIST_COMPATIBILITY 1
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Compiler memory barriers, specific to gcc and clang.
|
||||
*/
|
||||
#if defined(__GNUC__)
|
||||
#define __compiler_membar() __asm __volatile(" " : : : "memory")
|
||||
#endif
|
||||
|
||||
#ifndef __INTEL_COMPILER
|
||||
# define __GNUCLIKE_BUILTIN_NEXT_ARG 1
|
||||
# define __GNUCLIKE_MATH_BUILTIN_RELOPS
|
||||
|
|
|
|||
Loading…
Reference in New Issue