diff --git a/headers/private/graphics/nvidia/DriverInterface.h b/headers/private/graphics/nvidia/DriverInterface.h index e153a66ca7..5749c7ae5d 100644 --- a/headers/private/graphics/nvidia/DriverInterface.h +++ b/headers/private/graphics/nvidia/DriverInterface.h @@ -264,6 +264,7 @@ typedef struct { int_buf_info myBufInfo[MAXBUFFERS]; /* extra info on scaler input buffers */ overlay_token myToken; /* scaler is free/in use */ benaphore lock; /* for creating buffers and aquiring overlay unit routines */ + uint8 crtc; /* location of overlay unit */ } overlay; } shared_info; diff --git a/src/add-ons/accelerants/nvidia/Overlay.c b/src/add-ons/accelerants/nvidia/Overlay.c index 4d8ed173c0..683a659e15 100644 --- a/src/add-ons/accelerants/nvidia/Overlay.c +++ b/src/add-ons/accelerants/nvidia/Overlay.c @@ -1,4 +1,4 @@ -/* Written by Rudolf Cornelissen 05-2002/12-2003 */ +/* Written by Rudolf Cornelissen 05-2002/1-2004 */ /* Note on 'missing features' in BeOS 5.0.3 and DANO: * BeOS needs to define more colorspaces! It would be nice if BeOS would support the FourCC 'definitions' @@ -595,6 +595,25 @@ status_t CONFIGURE_OVERLAY { LOG(4,("succesfull, switching to buffer %d\n", offset)); + /* do 'overlay follow head' in dualhead modes on dualhead cards */ + if (si->ps.secondary_head) + { + switch (si->dm.flags & DUALHEAD_BITS) + { + case DUALHEAD_ON: + case DUALHEAD_SWITCH: + if ((ow->h_start + (ow->width / 2)) < (si->dm.virtual_width / 2)) + nv_bes_to_crtc(0); + else + nv_bes_to_crtc(1); + break; + default: + nv_bes_to_crtc(0); + break; + } + } + + /* _now_ program overlay hardware */ nv_configure_bes(ob, ow, ov, offset); return B_OK; diff --git a/src/add-ons/accelerants/nvidia/engine/nv_bes.c b/src/add-ons/accelerants/nvidia/engine/nv_bes.c index 77604e4921..be881443aa 100644 --- a/src/add-ons/accelerants/nvidia/engine/nv_bes.c +++ b/src/add-ons/accelerants/nvidia/engine/nv_bes.c @@ -8,6 +8,34 @@ //fixme: implement: (used for virtual screens!) //void move_overlay(uint16 hdisp_start, uint16 vdisp_start); +status_t nv_bes_to_crtc(uint8 crtc) +{ + if (si->ps.secondary_head) + { + if (crtc) + { + LOG(4,("Overlay: switching overlay to CRTC2\n")); + /* switch overlay engine to CRTC2 */ + NV_REG32(NV32_FUNCSEL) &= ~0x00001000; + NV_REG32(NV32_2FUNCSEL) |= 0x00001000; + si->overlay.crtc = 1; + } + else + { + LOG(4,("Overlay: switching overlay to CRTC1\n")); + /* switch overlay engine to CRTC1 */ + NV_REG32(NV32_2FUNCSEL) &= ~0x00001000; + NV_REG32(NV32_FUNCSEL) |= 0x00001000; + si->overlay.crtc = 0; + } + return B_OK; + } + else + { + return B_ERROR; + } +} + status_t nv_bes_init() { if (si->ps.card_arch < NV10A) @@ -103,13 +131,12 @@ status_t nv_configure_bes /* the BES does not respect virtual_workspaces, but adheres to CRTC * constraints only */ crtc_hstart = si->dm.h_display_start; - /* make dualhead switch mode with TVout enabled work while we're at it.. */ -//fixme: probably no fix at all needed on NV cards... -/* if (si->switched_crtcs) + /* make dualhead stretch and switch mode work while we're at it.. */ + if (si->overlay.crtc) { crtc_hstart += si->dm.timing.h_display; } -*/ + /* horizontal end is the first position beyond the displayed range on the CRTC */ crtc_hend = crtc_hstart + si->dm.timing.h_display; crtc_vstart = si->dm.v_display_start; diff --git a/src/add-ons/accelerants/nvidia/engine/nv_general.c b/src/add-ons/accelerants/nvidia/engine/nv_general.c index 72058d2407..fa31d63f78 100644 --- a/src/add-ons/accelerants/nvidia/engine/nv_general.c +++ b/src/add-ons/accelerants/nvidia/engine/nv_general.c @@ -80,7 +80,7 @@ status_t nv_general_powerup() { status_t status; - LOG(1,("POWERUP: nVidia (open)BeOS Accelerant 0.08-8 running.\n")); + LOG(1,("POWERUP: nVidia (open)BeOS Accelerant 0.08-9 running.\n")); /* preset no laptop */ si->ps.laptop = false; @@ -936,11 +936,14 @@ status_t nv_general_bios_to_powergraphics() if (si->ps.secondary_head) { - /* switch overlay engine to head 1 */ - //fixme: add other function blocks... - NV_REG32(NV32_FUNCSEL) |= 0x00001000; + /* switch overlay engine to CRTC1 */ + /* bit 12: overlay engine, + * bit 8: TVout chip (fixme: or bit 4?), + * bit 4: DDC channel (fixme: or bit 8?) */ NV_REG32(NV32_2FUNCSEL) &= ~0x00001000; + NV_REG32(NV32_FUNCSEL) |= 0x00001000; } + si->overlay.crtc = 0; /* enable 'enhanced' mode on primary head: */ /* enable access to primary head */ diff --git a/src/add-ons/accelerants/nvidia/engine/nv_proto.h b/src/add-ons/accelerants/nvidia/engine/nv_proto.h index 6a90d85f73..ec03a0d0c9 100644 --- a/src/add-ons/accelerants/nvidia/engine/nv_proto.h +++ b/src/add-ons/accelerants/nvidia/engine/nv_proto.h @@ -106,6 +106,7 @@ status_t nv_acc_wait_idle(void); /*backend scaler functions*/ status_t check_overlay_capability(uint32 feature); +status_t nv_bes_to_crtc(uint8 crtc); status_t nv_bes_init(void); status_t nv_configure_bes (const overlay_buffer *ob, const overlay_window *ow,const overlay_view *ov, int offset); diff --git a/src/add-ons/kernel/drivers/graphics/nvidia/README.html b/src/add-ons/kernel/drivers/graphics/nvidia/README.html index 43c608735c..018ebe115f 100644 --- a/src/add-ons/kernel/drivers/graphics/nvidia/README.html +++ b/src/add-ons/kernel/drivers/graphics/nvidia/README.html @@ -34,8 +34,8 @@ Especially owners of laptops are encouraged to be extra carefull with their inte
(Page last updated on January 22, 2004)
+(Page last updated on January 27, 2004)