Work in progress while trying to fix ticket #2227:
- Removed most of the currently fixup code as, at least on my machine, it was messing stuff up. This makes the PATA controller work in IDE mode! - Added comments to clarify things and TODOs about what is still missing (specially getting AHCI mode working). Marcus, please review. git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@26844 a95241bf-73f2-0310-859d-f6bbb57e9c96
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@ -1,5 +1,5 @@
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/*
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* Copyright 2007-2008, Marcus Overhagen. All rights reserved.
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* Copyright 2007, Marcus Overhagen. All rights reserved.
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* Distributed under the terms of the MIT License.
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*/
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@ -19,14 +19,16 @@ static void
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jmicron_fixup_ahci(PCI *pci, int domain, uint8 bus, uint8 device,
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uint8 function, uint16 deviceId)
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{
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switch (deviceId)
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{
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// We only care about devices with function 0.
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if (function != 0)
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return;
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// And only devices with combined SATA/PATA.
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switch (deviceId) {
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case 0x2361: // 1 SATA, 1 PATA
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case 0x2363: // 2 SATA, 1 PATA
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case 0x2366: // 2 SATA, 2 PATA
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break;
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// case 0x2360: // 1 SATA
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// case 0x2362: // 2 SATA
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default:
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return;
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}
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@ -34,32 +36,30 @@ jmicron_fixup_ahci(PCI *pci, int domain, uint8 bus, uint8 device,
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dprintf("jmicron_fixup_ahci: domain %u, bus %u, device %u, function %u, "
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"deviceId 0x%04x\n", domain, bus, device, function, deviceId);
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if (function == 0)
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{
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dprintf("jmicron_fixup_ahci: 0x40: 0x%08lx\n",
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pci->ReadConfig(domain, bus, device, function, 0x40, 4));
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dprintf("jmicron_fixup_ahci: 0xdc: 0x%08lx\n",
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pci->ReadConfig(domain, bus, device, function, 0xdc, 4));
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uint32 val = pci->ReadConfig(domain, bus, device, function, 0xdc, 4);
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if (!(val & (1 << 30))) {
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// IDE controller at function 1 is configured in IDE mode (as opposed
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// to AHCI or RAID). So we want to handle it.
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uint32 val = pci->ReadConfig(domain, bus, device, function, 0xdc, 4);
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if (!(val & (1 << 30)))
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{
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uint8 irq = pci->ReadConfig(domain, bus, device, function, 0x3c, 1);
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dprintf("jmicron_fixup_ahci: enabling split device mode\n");
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val &= ~(1 << 24);
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val |= (1 << 25) | (1 << 30);
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pci->WriteConfig(domain, bus, device, function, 0xdc, 4, val);
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val = pci->ReadConfig(domain, bus, device, function, 0x40, 4);
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val &= ~(1 << 16);
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val |= (1 << 1) | (1 << 17) | (1 << 22);
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pci->WriteConfig(domain, bus, device, function, 0x40, 4, val);
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// Set IRQ for dfunction 2 (IDE) device.
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pci->WriteConfig(domain, bus, device, 1, 0x3c, 1, irq);
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}
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dprintf("jmicron_fixup_ahci: 0x40: 0x%08lx\n",
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pci->ReadConfig(domain, bus, device, function, 0x40, 4));
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dprintf("jmicron_fixup_ahci: 0xdc: 0x%08lx\n",
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pci->ReadConfig(domain, bus, device, function, 0xdc, 4));
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dprintf("jmicron_fixup_ahci: PATA controller in IDE mode.\n");
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// TODO(bga): It seems that with recent BIOS revisions no special code
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// is needed here. We still want to handle IRQ assignment as seen
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// below.
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// Read IRQ from controller at function 0 and assign this IRQ to the
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// controller at function 1.
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uint8 irq = pci->ReadConfig(domain, bus, device, function, 0x3c, 1);
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pci->WriteConfig(domain, bus, device, 1, 0x3c, 1, irq);
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} else {
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// TODO(bga): If the PATA controller is set to AHCI mode, the IDE
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// driver will try to pick it up and will fail either because there is
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// no assigned IRQ or, if we assign an IRQ, because it errors-out when
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// detecting devices (probably because of the AHCI mode). Then the AHCI
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// driver picks the device up but fail to find the attached devices.
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// Maybe fixing this would be as simple as changing the device class to
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// Serial ATA Controller instead of IDE Controller (even in AHCI mode
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// it reports being a standard IDE controller)?
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}
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}
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@ -71,8 +71,7 @@ intel_fixup_ahci(PCI *pci, int domain, uint8 bus, uint8 device, uint8 function,
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// TODO(bga): disabled until the PCI manager can assign new resources.
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return;
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switch (deviceId)
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{
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switch (deviceId) {
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case 0x2825: // ICH8 Desktop when in IDE emulation mode
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dprintf("intel_fixup_ahci: WARNING found ICH8 device id 0x2825\n");
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return;
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@ -100,8 +99,7 @@ intel_fixup_ahci(PCI *pci, int domain, uint8 bus, uint8 device, uint8 function,
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pci->ReadConfig(domain, bus, device, function, 0x90, 1));
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uint8 map = pci->ReadConfig(domain, bus, device, function, 0x90, 1);
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if ((map >> 6) == 0)
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{
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if ((map >> 6) == 0) {
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uint32 bar5 = pci->ReadConfig(domain, bus, device, function, 0x24, 4);
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uint16 pcicmd = pci->ReadConfig(domain, bus, device, function,
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PCI_command, 2);
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@ -153,8 +151,7 @@ pci_fixup_device(PCI *pci, int domain, uint8 bus, uint8 device, uint8 function)
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// dprintf("pci_fixup_device: domain %u, bus %u, device %u, function %u\n",
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// domain, bus, device, function);
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switch (vendorId)
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{
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switch (vendorId) {
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case 0x197b:
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jmicron_fixup_ahci(pci, domain, bus, device, function, deviceId);
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break;
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