* hopefully display correctly Penryn based Pentium models (instead of Core 2 Extreme).

* fix a cache entry I introduced.


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@36332 a95241bf-73f2-0310-859d-f6bbb57e9c96
This commit is contained in:
Jérôme Duval 2010-04-17 16:20:27 +00:00
parent 42fb4f4050
commit c8d939eaa8
2 changed files with 3 additions and 1 deletions

View File

@ -189,6 +189,8 @@ get_cpu_model_string(system_info *info)
return "Core 2";
case B_CPU_INTEL_PENTIUM_CORE_2_45_NM:
get_cpuid_model_string(cpuidName);
if (strcasestr(cpuidName, "Core") == NULL)
return "Pentium";
if (strcasestr(cpuidName, "Celeron") != NULL)
return "Core 2 Celeron";
if (strcasestr(cpuidName, "Duo") != NULL

View File

@ -91,7 +91,7 @@ struct cache_description {
{0x7C, "L2 cache: 1024 KB, 8-way set associative, 64 bytes/line, dual-sectored"},
{0x7D, "L2 cache: 2048 KB, 8-way set associative, 64 bytes/line"},
{0x7E, /* IA-64 */ "L2 cache: 256 KB, 8-way set associative, 128 bytes/line, sectored"},
{0x7F, "L2 cache: 256 KB, 2-way set associative, 64 bytes/line, sectored"},
{0x7F, "L2 cache: 512 KB, 2-way set associative, 64 bytes/line"},
{0x81, "L2 cache: 128 KB, 8-way set associative, 32 bytes/line"},
{0x82, "L2 cache: 256 KB, 8-way set associative, 32 bytes/line"},
{0x83, "L2 cache: 512 KB, 8-way set associative, 32 bytes/line"},