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Remove the explicit PCI interrupt configuration. Not yet sure it will be required later on anyway. Should fix the build of non-x86 targets.

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git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@26503 a95241bf-73f2-0310-859d-f6bbb57e9c96
This commit is contained in:
Michael Lotz 2008-07-19 14:52:10 +00:00
parent 85db8e8380
commit c6bb6dfcf0
1 changed files with 0 additions and 9 deletions
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9
src/add-ons/kernel/bus_managers/pci/pci.cpp
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@ -16,9 +16,6 @@
#include "pci_private.h"
#include "pci.h"
// private header for configuring io interrupts to level triggered
#include <arch/int.h>
#define TRACE_CAP(x...) dprintf(x)
#define FLOW(x...)
//#define FLOW(x...) dprintf(x)
@ -1008,12 +1005,6 @@ PCI::_ReadHeaderInfo(PCIDev *dev)
dev->device, dev->function, PCI_min_grant, 1);
dev->info.u.h0.max_latency = ReadConfig(dev->domain, dev->bus,
dev->device, dev->function, PCI_max_latency, 1);
if (dev->info.u.h0.interrupt_line != 0
&& dev->info.u.h0.interrupt_line != 0xff) {
arch_int_configure_io_interrupt(dev->info.u.h0.interrupt_line,
B_LEVEL_TRIGGERED | B_LOW_ACTIVE_POLARITY);
}
break;
}