XHCI: Implement isochronous transfers support (!!).
Only out-bound isochronous transfers are tested right now, but in theory inbound ones "should" work just fine, too. The frame calculation has a bunch of TODOs around it, because I'm probably not doing it entirely correctly... But hey, I made this commit while listening to some glitchy (audio only in left channel, strange pops occurring intermittently, but otherwise it sounds 100% correct) music over my USB audio device! (I'm willing to blame the above problems on our rather buggy usb_audio driver.)
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Augustin Cavalier
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a3dca2984d
commit
c5ec5c0c38
@ -693,8 +693,6 @@ XHCI::SubmitTransfer(Transfer *transfer)
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TRACE("SubmitTransfer()\n");
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Pipe *pipe = transfer->TransferPipe();
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if ((pipe->Type() & USB_OBJECT_ISO_PIPE) != 0)
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return B_UNSUPPORTED;
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if ((pipe->Type() & USB_OBJECT_CONTROL_PIPE) != 0)
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return SubmitControlRequest(transfer);
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return SubmitNormalRequest(transfer);
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@ -708,6 +706,8 @@ XHCI::SubmitControlRequest(Transfer *transfer)
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usb_request_data *requestData = transfer->RequestData();
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bool directionIn = (requestData->RequestType & USB_REQTYPE_DEVICE_IN) != 0;
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TRACE("SubmitControlRequest() length %d\n", requestData->Length);
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xhci_endpoint *endpoint = (xhci_endpoint *)pipe->ControllerCookie();
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if (endpoint == NULL) {
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TRACE_ERROR("invalid endpoint!\n");
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@ -717,8 +717,6 @@ XHCI::SubmitControlRequest(Transfer *transfer)
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if (status != B_OK)
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return status;
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TRACE("SubmitControlRequest() length %d\n", requestData->Length);
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xhci_td *descriptor = CreateDescriptor(3, 1, requestData->Length);
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if (descriptor == NULL)
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return B_NO_MEMORY;
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@ -787,10 +785,12 @@ XHCI::SubmitNormalRequest(Transfer *transfer)
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TRACE("SubmitNormalRequest() length %ld\n", transfer->DataLength());
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Pipe *pipe = transfer->TransferPipe();
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usb_isochronous_data *isochronousData = transfer->IsochronousData();
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bool directionIn = (pipe->Direction() == Pipe::In);
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xhci_endpoint *endpoint = (xhci_endpoint *)pipe->ControllerCookie();
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if (endpoint == NULL)
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return B_BAD_VALUE;
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bool directionIn = (pipe->Direction() == Pipe::In);
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status_t status = transfer->InitKernelAccess();
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if (status != B_OK)
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@ -798,11 +798,25 @@ XHCI::SubmitNormalRequest(Transfer *transfer)
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// Compute the size to use for the TRBs, and then how many TRBs
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// of this size we will need. We always need at least 1, of course.
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const size_t dataLength = transfer->DataLength(),
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maxPacketSize = pipe->MaxPacketSize(),
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size_t dataLength = transfer->DataLength(),
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packetSize = pipe->MaxPacketSize(),
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packetsPerTrb = 4;
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const size_t trbSize = packetsPerTrb * maxPacketSize;
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int32 trbCount = (dataLength + trbSize - 1) / trbSize;
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if (isochronousData != NULL) {
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if (isochronousData->packet_count == 0)
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return B_BAD_VALUE;
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// Isochronous transfers use more specifically sized packets.
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packetSize = transfer->DataLength() / isochronousData->packet_count;
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if (packetSize > pipe->MaxPacketSize() || packetSize
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!= (size_t)isochronousData->packet_descriptors[0].request_length)
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return B_BAD_VALUE;
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packetsPerTrb = 1;
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}
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// Now that we know packetSize & packetsPerTrb, compute TRB size and count.
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const size_t trbSize = packetsPerTrb * packetSize;
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const int32 trbCount = (dataLength + trbSize - 1) / trbSize;
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xhci_td *td = CreateDescriptor(trbCount, trbCount, trbSize);
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if (td == NULL)
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@ -810,7 +824,7 @@ XHCI::SubmitNormalRequest(Transfer *transfer)
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// Normal Stage
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size_t remaining = dataLength;
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int32 remainingPackets = (remaining - trbSize) / maxPacketSize;
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int32 remainingPackets = (remaining - trbSize) / packetSize;
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for (int32 i = 0; i < trbCount; i++) {
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// The "TD Size" field of a transfer TRB indicates the number of
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// remaining maximum-size *packets* in this TD, *not* including the
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@ -834,6 +848,50 @@ XHCI::SubmitNormalRequest(Transfer *transfer)
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remainingPackets -= packetsPerTrb;
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}
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// Isochronous-specific
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if (isochronousData != NULL) {
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// This is an isochronous transfer; we need to make the first TRB
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// an isochronous TRB.
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td->trbs[0].flags &= ~(TRB_3_TYPE(TRB_TYPE_NORMAL));
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td->trbs[0].flags |= TRB_3_TYPE(TRB_TYPE_ISOCH);
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// Isochronous pipes are scheduled by microframes, one of which
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// is 125us for USB 2 and above. But for USB 1 it was 1ms, so
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// we need to use a different frame delta for that case.
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uint8 frameDelta = 1;
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if (transfer->TransferPipe()->Speed() == USB_SPEED_FULLSPEED)
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frameDelta = 8;
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// TODO: We do not currently take Mult into account at all!
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// How are we supposed to do that here?
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// Determine the (starting) frame number: if ISO_ASAP is set,
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// we are queueing this "right away", and so want to reset
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// the starting_frame_number. Otherwise we use the passed one.
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uint32 frame;
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if ((isochronousData->flags & USB_ISO_ASAP) != 0
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|| isochronousData->starting_frame_number == NULL) {
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frame = ReadRunReg32(XHCI_MFINDEX) + 1;
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// TODO: The +1 comes from the XHCI spec; document that.
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td->trbs[0].flags |= TRB_3_ISO_SIA_BIT;
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} else {
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frame = *isochronousData->starting_frame_number;
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td->trbs[0].flags |= TRB_3_FRID(frame);
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}
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frame = (frame + frameDelta) % 2048;
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if (isochronousData->starting_frame_number != NULL)
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*isochronousData->starting_frame_number = frame;
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// TODO: The OHCI bus driver seems to also do this for inbound
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// isochronous transfers. Perhaps it should be moved into the stack?
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if (directionIn) {
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for (uint32 i = 0; i < isochronousData->packet_count; i++) {
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isochronousData->packet_descriptors[i].actual_length = 0;
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isochronousData->packet_descriptors[i].status = B_NO_INIT;
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}
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}
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}
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// Set the ENT (Evaluate Next TRB) bit, so that the HC will not switch
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// contexts before evaluating the Link TRB that _LinkDescriptorForPipe
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// will insert, as otherwise there would be a race between us freeing
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@ -903,6 +961,8 @@ XHCI::CancelQueuedTransfers(Pipe *pipe, bool force)
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// We can't cancel or delete transfers under "force", as they probably
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// are not safe to use anymore.
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for (xhci_td* td = td_head; td != NULL; td = td->next) {
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if (td->transfer == NULL)
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continue;
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if (!force) {
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transfers[transfersCount] = td->transfer;
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transfersCount++;
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@ -2003,7 +2063,13 @@ XHCI::ConfigureEndpoint(uint8 slot, uint8 number, uint8 type, bool directionIn,
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// Control pipes are a special case, as they rarely have
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// outbound transfers of any substantial size.
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dwendpoint4 |= ENDPOINT_4_AVGTRBLENGTH(8);
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} else if ((type & USB_OBJECT_ISO_PIPE) != 0) {
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// Isochronous pipes are another special case: the TRB size will be
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// one packet (which is normally smaller than the max packet size,
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// but we don't know what it is here.)
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dwendpoint4 |= ENDPOINT_4_AVGTRBLENGTH(maxPacketSize);
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} else {
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// Under all other circumstances, we put 4 packets in a TRB.
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dwendpoint4 |= ENDPOINT_4_AVGTRBLENGTH(maxPacketSize * 4);
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}
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@ -2042,6 +2108,9 @@ XHCI::ConfigureEndpoint(uint8 slot, uint8 number, uint8 type, bool directionIn,
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status_t
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XHCI::GetPortSpeed(uint8 index, usb_speed* speed)
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{
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if (index >= fPortCount)
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return B_BAD_INDEX;
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uint32 portStatus = ReadOpReg(XHCI_PORTSC(index));
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switch (PS_SPEED_GET(portStatus)) {
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@ -2839,6 +2908,20 @@ XHCI::FinishTransfers()
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TRACE("transfer not successful, actualLength=%" B_PRIuSIZE "\n",
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actualLength);
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}
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usb_isochronous_data* isochronousData = transfer->IsochronousData();
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if (isochronousData != NULL) {
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size_t packetSize = transfer->DataLength() / isochronousData->packet_count,
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left = actualLength;
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for (uint32 i = 0; i < isochronousData->packet_count; i++) {
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size_t size = min_c(packetSize, left);
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isochronousData->packet_descriptors[i].actual_length = size;
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isochronousData->packet_descriptors[i].status = (size > 0)
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? B_OK : B_DEV_FIFO_UNDERRUN;
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left -= size;
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}
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}
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if (callbackStatus == B_OK && directionIn && actualLength > 0) {
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TRACE("copying in iov count %ld\n", transfer->VectorCount());
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status_t status = transfer->PrepareKernelAccess();
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@ -102,6 +102,7 @@
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// Host Controller Runtime Registers
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#define XHCI_MFINDEX 0x0000
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// Section 5.5.2.1
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#define XHCI_IMAN(n) (0x0020 + (0x20 * (n)))
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// IMAN
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