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removed a lot of refs to nVidia

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git-svn-id: file:///srv/svn/repos/haiku/trunk/current@9793 a95241bf-73f2-0310-859d-f6bbb57e9c96
This commit is contained in:
Rudolf Cornelissen 2004-11-04 15:30:29 +00:00
parent 2301c0f45a
commit bdc26929fd
2 changed files with 15 additions and 15 deletions
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18
headers/private/graphics/skeleton/DriverInterface.h
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@ -82,7 +82,7 @@ typedef struct
uint32 size;
} int_buf_info;
typedef struct settings { // apsed, see comments in nv.settings
typedef struct settings { // apsed, see comments in skel.settings
// for driver
char accelerant[B_FILE_NAME_LENGTH];
bool dumprom;
@ -284,7 +284,7 @@ typedef struct {
/* mirror of the ROM (copied in driver, because may not be mapped permanently) */
uint8 rom_mirror[65536];
/* some configuration settings from ~/config/settings/kernel/drivers/nv.settings if exists */
/* some configuration settings from ~/config/settings/kernel/drivers/skel.settings if exists */
settings settings;
struct
@ -311,26 +311,26 @@ typedef struct {
uint32 offset; /* Offset to read/write */
uint32 size; /* Number of bytes to transfer */
uint32 value; /* The value read or written */
} nv_get_set_pci;
} eng_get_set_pci;
/* Set some boolean condition (like enabling or disabling interrupts) */
typedef struct {
uint32 magic; /* magic number to make sure the caller groks us */
bool do_it; /* state to set */
} nv_set_bool_state;
} eng_set_bool_state;
/* Retrieve the area_id of the kernel/accelerant shared info */
typedef struct {
uint32 magic; /* magic number to make sure the caller groks us */
area_id shared_info_area; /* area_id containing the shared information */
} nv_get_private_data;
} eng_get_private_data;
/* Retrieve the device name. Usefull for when we have a file handle, but want
to know the device name (like when we are cloning the accelerant) */
typedef struct {
uint32 magic; /* magic number to make sure the caller groks us */
char *name; /* The name of the device, less the /dev root */
} nv_device_name;
} eng_device_name;
/* Retrieve an AGP device interface if there. Usefull to find the AGP speed scheme
used (pre 3.x or 3.x) */
@ -340,14 +340,14 @@ typedef struct {
uint8 index; /* device index in list of devices found */
bool exist; /* we got AGP device info */
agp_info agpi; /* AGP interface info of a device */
} nv_nth_agp_info;
} eng_nth_agp_info;
/* Execute an AGP command */
typedef struct {
uint32 magic; /* magic number to make sure the caller groks us */
bool agp_bus;/* indicates if we have access to the AGP busmanager */
uint32 cmd; /* actual command to execute */
} nv_cmd_agp;
} eng_cmd_agp;
/* Read or write a value in ISA I/O space */
typedef struct {
@ -355,7 +355,7 @@ typedef struct {
uint16 adress; /* Offset to read/write */
uint8 size; /* Number of bytes to transfer */
uint16 data; /* The value read or written */
} nv_in_out_isa;
} eng_in_out_isa;
enum {

12
headers/private/graphics/skeleton/macros.h
View File

@ -743,14 +743,14 @@
#define NV_REG32(r_) ((vuint32 *)regs)[(r_) >> 2]
/* read and write to PCI config space */
#define CFGR(A) (nv_pci_access.offset=NVCFG_##A, ioctl(fd,NV_GET_PCI, &nv_pci_access,sizeof(nv_pci_access)), nv_pci_access.value)
#define CFGW(A,B) (nv_pci_access.offset=NVCFG_##A, nv_pci_access.value = B, ioctl(fd,NV_SET_PCI,&nv_pci_access,sizeof(nv_pci_access)))
#define CFGR(A) (eng_pci_access.offset=NVCFG_##A, ioctl(fd,NV_GET_PCI, &eng_pci_access,sizeof(eng_pci_access)), eng_pci_access.value)
#define CFGW(A,B) (eng_pci_access.offset=NVCFG_##A, eng_pci_access.value = B, ioctl(fd,NV_SET_PCI,&eng_pci_access,sizeof(eng_pci_access)))
/* read and write from ISA I/O space */
#define ISAWB(A,B)(nv_isa_access.adress=A, nv_isa_access.data = (uint8)B, nv_isa_access.size = 1, ioctl(fd,NV_ISA_OUT, &nv_isa_access,sizeof(nv_isa_access)))
#define ISAWW(A,B)(nv_isa_access.adress=A, nv_isa_access.data = B, nv_isa_access.size = 2, ioctl(fd,NV_ISA_OUT, &nv_isa_access,sizeof(nv_isa_access)))
#define ISARB(A) (nv_isa_access.adress=A, ioctl(fd,NV_ISA_IN, &nv_isa_access,sizeof(nv_isa_access)), (uint8)nv_isa_access.data)
#define ISARW(A) (nv_isa_access.adress=A, ioctl(fd,NV_ISA_IN, &nv_isa_access,sizeof(nv_isa_access)), nv_isa_access.data)
#define ISAWB(A,B)(eng_isa_access.adress=A, eng_isa_access.data = (uint8)B, eng_isa_access.size = 1, ioctl(fd,NV_ISA_OUT, &eng_isa_access,sizeof(eng_isa_access)))
#define ISAWW(A,B)(eng_isa_access.adress=A, eng_isa_access.data = B, eng_isa_access.size = 2, ioctl(fd,NV_ISA_OUT, &eng_isa_access,sizeof(eng_isa_access)))
#define ISARB(A) (eng_isa_access.adress=A, ioctl(fd,NV_ISA_IN, &eng_isa_access,sizeof(eng_isa_access)), (uint8)eng_isa_access.data)
#define ISARW(A) (eng_isa_access.adress=A, ioctl(fd,NV_ISA_IN, &eng_isa_access,sizeof(eng_isa_access)), eng_isa_access.data)
/* read and write from the dac registers */
#define DACR(A) (NV_REG32(NVDAC_##A))