* start using DCE versions in framebuffer code as it
gives us finer control git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42898 a95241bf-73f2-0310-859d-f6bbb57e9c96
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@ -846,7 +846,7 @@ display_crtc_scale(uint8 crtcID, display_mode *mode)
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args.ucScaler = crtcID;
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args.ucEnable = ATOM_SCALER_EXPANSION;
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atom_execute_table(gAtomContext, index, (uint32 *)&args);
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atom_execute_table(gAtomContext, index, (uint32*)&args);
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}
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@ -857,7 +857,7 @@ display_crtc_fb_set(uint8 crtcID, display_mode *mode)
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register_info* regs = gDisplay[crtcID]->regs;
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uint32 fbSwap;
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if (info.device_chipset >= RADEON_R1000)
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if (info.dceMajor >= 4)
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fbSwap = EVERGREEN_GRPH_ENDIAN_SWAP(EVERGREEN_GRPH_ENDIAN_NONE);
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else
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fbSwap = R600_D1GRPH_SWAP_ENDIAN_NONE;
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@ -871,7 +871,7 @@ display_crtc_fb_set(uint8 crtcID, display_mode *mode)
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case B_CMAP8:
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bytesPerPixel = 1;
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bitsPerPixel = 8;
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if (info.device_chipset >= RADEON_R1000) { // DCE4
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if (info.dceMajor >= 4) {
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fbFormat = (EVERGREEN_GRPH_DEPTH(EVERGREEN_GRPH_DEPTH_8BPP)
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| EVERGREEN_GRPH_FORMAT(EVERGREEN_GRPH_FORMAT_INDEXED));
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} else {
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@ -882,7 +882,7 @@ display_crtc_fb_set(uint8 crtcID, display_mode *mode)
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case B_RGB15_LITTLE:
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bytesPerPixel = 2;
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bitsPerPixel = 15;
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if (info.device_chipset >= RADEON_R1000) { // DCE4
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if (info.dceMajor >= 4) {
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fbFormat = (EVERGREEN_GRPH_DEPTH(EVERGREEN_GRPH_DEPTH_16BPP)
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| EVERGREEN_GRPH_FORMAT(EVERGREEN_GRPH_FORMAT_ARGB1555));
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} else {
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@ -894,7 +894,7 @@ display_crtc_fb_set(uint8 crtcID, display_mode *mode)
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bytesPerPixel = 2;
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bitsPerPixel = 16;
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if (info.device_chipset >= RADEON_R1000) { // DCE4
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if (info.dceMajor >= 4) {
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fbFormat = (EVERGREEN_GRPH_DEPTH(EVERGREEN_GRPH_DEPTH_16BPP)
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| EVERGREEN_GRPH_FORMAT(EVERGREEN_GRPH_FORMAT_ARGB565));
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#ifdef __POWERPC__
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@ -914,7 +914,7 @@ display_crtc_fb_set(uint8 crtcID, display_mode *mode)
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default:
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bytesPerPixel = 4;
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bitsPerPixel = 32;
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if (info.device_chipset >= RADEON_R1000) { // DCE4
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if (info.dceMajor >= 4) {
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fbFormat = (EVERGREEN_GRPH_DEPTH(EVERGREEN_GRPH_DEPTH_32BPP)
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| EVERGREEN_GRPH_FORMAT(EVERGREEN_GRPH_FORMAT_ARGB8888));
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#ifdef __POWERPC__
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@ -974,7 +974,7 @@ display_crtc_fb_set(uint8 crtcID, display_mode *mode)
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(viewport_w << 16) | viewport_h);
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// Pageflip setup
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if (info.device_chipset >= RADEON_R1000) { // DCE4
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if (info.dceMajor >= 4) {
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uint32 tmp
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= Read32(OUT, EVERGREEN_GRPH_FLIP_CONTROL + regs->crtcOffset);
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tmp &= ~EVERGREEN_GRPH_SURFACE_UPDATE_H_RETRACE_EN;
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