diff --git a/headers/private/graphics/AGP.h b/headers/private/graphics/AGP.h
new file mode 100644
index 0000000000..4f53152f79
--- /dev/null
+++ b/headers/private/graphics/AGP.h
@@ -0,0 +1,95 @@
+/*******************************************************************************
+/
+/	File:		AGP.h
+/
+/	Description:	Interface to the AGP bus and driver.
+/	For more information, see "AGP interface specification", Revision 2.0 and 3.0,
+/	Intel Corporation, 1998-2002.
+/
+/	Rudolf Cornelissen 6/2004.
+/
+*******************************************************************************/
+
+#if !defined(_AGP_H_)
+#define _AGP_H_
+
+#include <Drivers.h>
+
+/* The API for driver access is C, not C++ */
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+
+//driver IOCTRL argument:
+typedef struct {
+	struct
+	{
+		ushort	vendor_id,	/* host bridge vendor id */
+				device_id;	/* host bridge device id */
+	} dev;
+	struct
+	{
+		uint32	agp_cap_id,	/* AGP capability register as defined in the AGP standard */
+				agp_stat,	/* AGP STATUS register as defined in the AGP standard */
+				agp_cmd;	/* AGP COMMAND register as defined in the AGP standard */
+	}config;
+	status_t	status;		/* hostbridge usability status (B_OK if usable, B_ERROR if it
+							 * did not respond according to the AGP standard */
+} agp_info;
+
+
+//driver IOCTRL operation codes:
+enum
+{
+	GET_CONFIG = B_DEVICE_OP_CODES_END+20001, 
+    SET_CONFIG,
+};
+
+
+/* ---
+	value for the AGP_id field in the agp_cap_id register
+--- */
+#define AGP_id	0x02	/* AGP device identification */
+
+
+/* ---
+	masks for capability ID register bits
+--- */
+#define AGP_id_mask		0x000000ff	/* AGP capability identification, contains value 0x02 for AGP device */
+#define AGP_next_ptr	0x0000ff00	/* pointer to next item in PCI capabilities list, contains 0x00 if this is last item */
+#define AGP_next_ptr_shift		 8
+#define AGP_rev_minor	0x000f0000	/* AGP Revision minor number reported */
+#define AGP_rev_minor_shift		16
+#define AGP_rev_major	0x00f00000	/* AGP Revision major number reported */
+#define AGP_rev_major_shift		20
+
+
+/* ---
+	masks for status and command register bits
+--- */
+#define AGP_2_1x		0x00000001	/* AGP Revision 2.0 1x speed transfer mode */
+#define AGP_2_2x		0x00000002	/* AGP Revision 2.0 2x speed transfer mode */
+#define AGP_2_4x		0x00000004	/* AGP Revision 2.0 4x speed transfer mode */
+#define AGP_3_4x		0x00000001	/* AGP Revision 3.0 4x speed transfer mode */
+#define AGP_3_8x		0x00000002	/* AGP Revision 3.0 8x speed transfer mode */
+#define AGP_rates		0x00000007	/* mask for supported rates info */
+#define AGP_rate_rev	0x00000008	/* 0 if AGP Revision 2.0 or earlier rate scheme, 1 if AGP Revision 3.0 rate scheme */
+#define AGP_FW			0x00000010	/* 1 if fastwrite transfers supported */
+#define AGP_4G			0x00000020	/* 1 if adresses above 4G bytes supported */
+#define AGP_SBA			0x00000200	/* 1 if sideband adressing supported */
+#define AGP_RQ			0xff000000	/* max. number of enqueued AGP command requests supported, minus one */
+#define AGP_RQ_shift			24
+
+
+/* ---
+	masks for command register bits
+--- */
+#define AGP_enable		0x00000100	/* set to 1 if AGP should be enabled */
+
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif