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overlay fix for Nforce and Nforce2 cards (RAM detection updated)

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git-svn-id: file:///srv/svn/repos/haiku/trunk/current@8469 a95241bf-73f2-0310-859d-f6bbb57e9c96
This commit is contained in:
Rudolf Cornelissen 2004-07-26 11:26:12 +00:00
parent 62b6801d11
commit a7b24bba52
10 changed files with 61 additions and 50 deletions
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2
headers/private/graphics/nvidia/DriverInterface.h
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@ -271,7 +271,7 @@ typedef struct {
bool tvout;
bool primary_dvi;
bool secondary_dvi;
uint32 memory_size; /* memory (Mb) */
uint32 memory_size; /* memory (in bytes) */
} ps;
/* mirror of the ROM (copied in driver, because may not be mapped permanently) */

2
src/add-ons/accelerants/nvidia/GetDeviceInfo.c
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@ -80,7 +80,7 @@ status_t GET_ACCELERANT_DEVICE_INFO(accelerant_device_info * adi)
break;
}
sprintf(adi->serial_no, "unknown");
adi->memory = si->ps.memory_size * 1024 * 1024;
adi->memory = si->ps.memory_size;
adi->dac_speed = si->ps.max_dac1_clock;
return B_OK;

8
src/add-ons/accelerants/nvidia/Overlay.c
View File

@ -1,4 +1,4 @@
/* Written by Rudolf Cornelissen 05/2002-6/2004 */
/* Written by Rudolf Cornelissen 05/2002-7/2004 */
/* Note on 'missing features' in BeOS 5.0.3 and DANO:
* BeOS needs to define more colorspaces! It would be nice if BeOS would support the FourCC 'definitions'
@ -80,7 +80,7 @@ const overlay_buffer *ALLOCATE_OVERLAY_BUFFER(color_space cs, uint16 width, uint
LOG(4,("Overlay: cardRAM_start = $%08x\n",(uint32)((uint8*)si->framebuffer)));
LOG(4,("Overlay: cardRAM_start_DMA = $%08x\n",(uint32)((uint8*)si->framebuffer_pci)));
LOG(4,("Overlay: cardRAM_size = %dMb\n",si->ps.memory_size));
LOG(4,("Overlay: cardRAM_size = %3.3fMb\n",(si->ps.memory_size / (1024.0 * 1024.0))));
/* find first empty slot (room for another buffer?) */
for (offset = 0; offset < MAXBUFFERS; offset++)
@ -204,7 +204,7 @@ const overlay_buffer *ALLOCATE_OVERLAY_BUFFER(color_space cs, uint16 width, uint
* If you switch now to settings: 1600x1200x32bit (single head) the app needs to fallback to
* bitmap output or maybe single buffered overlay output if small bitmaps are used. */
adress = (((uint32)((uint8*)si->framebuffer)) + (si->ps.memory_size * 1024 * 1024));
adress = (((uint32)((uint8*)si->framebuffer)) + si->ps.memory_size);
for (cnt = 0; cnt <= offset; cnt++)
{
adress -= si->overlay.myBufInfo[cnt].size;
@ -288,7 +288,7 @@ const overlay_buffer *ALLOCATE_OVERLAY_BUFFER(color_space cs, uint16 width, uint
si->overlay.myBuffer[offset].buffer = (void *) adress;
/* calculate physical memory adress (for dma use) */
adress = (((uint32)((uint8*)si->framebuffer_pci)) + (si->ps.memory_size * 1024 * 1024));
adress = (((uint32)((uint8*)si->framebuffer_pci)) + si->ps.memory_size);
for (cnt = 0; cnt <= offset; cnt++)
{
adress -= si->overlay.myBufInfo[cnt].size;

12
src/add-ons/accelerants/nvidia/ProposeDisplayMode.c
View File

@ -4,7 +4,7 @@
Other authors for NV driver:
Mark Watson,
Rudolf Cornelissen 9/2002-5/2004
Rudolf Cornelissen 9/2002-7/2004
*/
#define MODULE_BIT 0x00400000
@ -355,10 +355,10 @@ status_t PROPOSE_DISPLAY_MODE(display_mode *target, const display_mode *low, con
if (si->settings.hardcursor) pointer_reservation = 2048;
/* memory requirement for frame buffer */
if ((row_bytes * target->virtual_height) >
((si->ps.memory_size * 1024 * 1024) - pointer_reservation))
(si->ps.memory_size - pointer_reservation))
{
target->virtual_height =
((si->ps.memory_size * 1024 * 1024) - pointer_reservation) / row_bytes;
(si->ps.memory_size - pointer_reservation) / row_bytes;
}
if (target->virtual_height < target->timing.v_display)
{
@ -425,7 +425,7 @@ status_t PROPOSE_DISPLAY_MODE(display_mode *target, const display_mode *low, con
{
case DUALHEAD_ON:
case DUALHEAD_SWITCH:
if ((((si->ps.memory_size * 1024 * 1024) - pointer_reservation) >=
if (((si->ps.memory_size - pointer_reservation) >=
(row_bytes * target->virtual_height)) &&
((uint16)(row_bytes / bpp) >= (target->timing.h_display * 2)))
{
@ -433,14 +433,14 @@ status_t PROPOSE_DISPLAY_MODE(display_mode *target, const display_mode *low, con
}
break;
case DUALHEAD_CLONE:
if (((si->ps.memory_size * 1024 * 1024) - pointer_reservation) >=
if ((si->ps.memory_size - pointer_reservation) >=
(row_bytes * target->virtual_height))
{
target->flags |= DUALHEAD_CAPABLE;
}
break;
case DUALHEAD_OFF:
if (((si->ps.memory_size * 1024 * 1024) - pointer_reservation) >=
if ((si->ps.memory_size - pointer_reservation) >=
(row_bytes * target->virtual_height * 2))
{
target->flags |= DUALHEAD_CAPABLE;

22
src/add-ons/accelerants/nvidia/engine/nv_acc.c
View File

@ -1,6 +1,6 @@
/* NV Acceleration functions */
/* Author:
Rudolf Cornelissen 8/2003-12/2003.
Rudolf Cornelissen 8/2003-7/2004.
This code was possible thanks to the Linux NV driver.
*/
@ -314,25 +314,25 @@ status_t nv_acc_init()
ACCW(BBASE1, 0x00000000);
ACCW(BBASE2, 0x00000000);
ACCW(BBASE3, 0x00000000);
ACCW(BLIMIT0, ((si->ps.memory_size << 20) - 1));
ACCW(BLIMIT1, ((si->ps.memory_size << 20) - 1));
ACCW(BLIMIT2, ((si->ps.memory_size << 20) - 1));
ACCW(BLIMIT3, ((si->ps.memory_size << 20) - 1));
ACCW(BLIMIT0, (si->ps.memory_size - 1));
ACCW(BLIMIT1, (si->ps.memory_size - 1));
ACCW(BLIMIT2, (si->ps.memory_size - 1));
ACCW(BLIMIT3, (si->ps.memory_size - 1));
if (si->ps.card_arch >= NV10A)
{
ACCW(NV10_BBASE4, 0x00000000);
ACCW(NV10_BBASE5, 0x00000000);
ACCW(NV10_BLIMIT4, ((si->ps.memory_size << 20) - 1));
ACCW(NV10_BLIMIT5, ((si->ps.memory_size << 20) - 1));
ACCW(NV10_BLIMIT4, (si->ps.memory_size - 1));
ACCW(NV10_BLIMIT5, (si->ps.memory_size - 1));
}
if (si->ps.card_arch >= NV20A)
{
/* fixme(?): assuming more BLIMIT registers here: Then how about BBASE6-9?
* (linux fixed value 'BLIMIT6-9' 0x01ffffff) */
ACCW(NV20_BLIMIT6, ((si->ps.memory_size << 20) - 1));
ACCW(NV20_BLIMIT7, ((si->ps.memory_size << 20) - 1));
ACCW(NV20_BLIMIT8, ((si->ps.memory_size << 20) - 1));
ACCW(NV20_BLIMIT9, ((si->ps.memory_size << 20) - 1));
ACCW(NV20_BLIMIT6, (si->ps.memory_size - 1));
ACCW(NV20_BLIMIT7, (si->ps.memory_size - 1));
ACCW(NV20_BLIMIT8, (si->ps.memory_size - 1));
ACCW(NV20_BLIMIT9, (si->ps.memory_size - 1));
}
/* disable all acceleration engine INT reguests */

4
src/add-ons/accelerants/nvidia/engine/nv_bes.c
View File

@ -1,5 +1,5 @@
/* Nvidia TNT and GeForce Back End Scaler functions */
/* Written by Rudolf Cornelissen 05/2002-6/2004 */
/* Written by Rudolf Cornelissen 05/2002-7/2004 */
#define MODULE_BIT 0x00000200
@ -409,7 +409,7 @@ status_t nv_bes_init()
/* shut off GeForce4MX MPEG2 decoder */
BESW(DEC_GENCTRL, 0x00000000);
/* setup BES memory-range mask */
BESW(NV10_0MEMMASK, ((si->ps.memory_size << 20) - 1));
BESW(NV10_0MEMMASK, (si->ps.memory_size - 1));
/* unknown, but needed */
BESW(NV10_0OFFSET, 0x00000000);

6
src/add-ons/accelerants/nvidia/engine/nv_general.c
View File

@ -80,7 +80,7 @@ status_t nv_general_powerup()
{
status_t status;
LOG(1,("POWERUP: nVidia (open)BeOS Accelerant 0.22 running.\n"));
LOG(1,("POWERUP: nVidia (open)BeOS Accelerant 0.23 running.\n"));
/* preset no laptop */
si->ps.laptop = false;
@ -596,10 +596,6 @@ status_t nv_general_powerup()
return B_ERROR;
}
/* override memory detection if requested by user */
if (si->settings.memory != 0)
si->ps.memory_size = si->settings.memory;
return status;
}

37
src/add-ons/accelerants/nvidia/engine/nv_info.c
View File

@ -232,6 +232,13 @@ void fake_pins(void)
break;
}
/* override memory detection if requested by user */
if (si->settings.memory != 0)
{
LOG(2,("INFO: forcing memory size (specified in settings file)\n"));
si->ps.memory_size = si->settings.memory * 1024 * 1024;
}
/* find out if the card has a tvout chip */
si->ps.tvout = false;
si->ps.tvout_chip_type = NONE;
@ -1006,7 +1013,7 @@ static void getstrap_arch_nv4(void)
if (strapinfo & 0x00000100)
{
/* Unified memory architecture used */
si->ps.memory_size =
si->ps.memory_size = 1024 * 1024 *
((((strapinfo & 0x0000f000) >> 12) * 2) + 2);
LOG(8,("INFO: NV4 architecture chip with UMA detected\n"));
@ -1017,16 +1024,16 @@ static void getstrap_arch_nv4(void)
switch (strapinfo & 0x00000003)
{
case 0:
si->ps.memory_size = 32;
si->ps.memory_size = 32 * 1024 * 1024;
break;
case 1:
si->ps.memory_size = 4;
si->ps.memory_size = 4 * 1024 * 1024;
break;
case 2:
si->ps.memory_size = 8;
si->ps.memory_size = 8 * 1024 * 1024;
break;
case 3:
si->ps.memory_size = 16;
si->ps.memory_size = 16 * 1024 * 1024;
break;
}
}
@ -1062,31 +1069,31 @@ static void getstrap_arch_nv10_20_30(void)
switch ((strapinfo & 0x1ff00000) >> 20)
{
case 2:
si->ps.memory_size = 2;
si->ps.memory_size = 2 * 1024 * 1024;
break;
case 4:
si->ps.memory_size = 4;
si->ps.memory_size = 4 * 1024 * 1024;
break;
case 8:
si->ps.memory_size = 8;
si->ps.memory_size = 8 * 1024 * 1024;
break;
case 16:
si->ps.memory_size = 16;
si->ps.memory_size = 16 * 1024 * 1024;
break;
case 32:
si->ps.memory_size = 32;
si->ps.memory_size = 32 * 1024 * 1024;
break;
case 64:
si->ps.memory_size = 64;
si->ps.memory_size = 64 * 1024 * 1024;
break;
case 128:
si->ps.memory_size = 128;
si->ps.memory_size = 128 * 1024 * 1024;
break;
case 256:
si->ps.memory_size = 256;
si->ps.memory_size = 256 * 1024 * 1024;
break;
default:
si->ps.memory_size = 16;
si->ps.memory_size = 16 * 1024 * 1024;
LOG(8,("INFO: NV10/20/30 architecture chip with unknown RAM amount detected;\n"));
LOG(8,("INFO: Setting 16Mb\n"));
@ -1238,7 +1245,7 @@ void dump_pins(void)
// if (si->ps.primary_dvi) LOG(2,("present\n")); else LOG(2,("absent\n"));
// LOG(2,("secondary_dvi: "));
// if (si->ps.secondary_dvi) LOG(2,("present\n")); else LOG(2,("absent\n"));
LOG(2,("card memory_size: %dMb\n", si->ps.memory_size));
LOG(2,("card memory_size: %3.3fMb\n", (si->ps.memory_size / (1024.0 * 1024.0))));
LOG(2,("laptop: "));
if (si->ps.laptop) LOG(2,("yes\n")); else LOG(2,("no\n"));
if (si->ps.tmds1_active)

6
src/add-ons/kernel/drivers/graphics/nvidia/UPDATE.html
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@ -4,12 +4,16 @@
</head>
<body>
<p><h2>Changes done for each driverversion:</h2></p>
<p><h1>head 0.23, (Rudolf)</h1></p>
<ul>
<li>Overlay fix for GeForce2 and GeForce4 MX Integrated GPU boards: updated RAM amount detection. The last 64Kb RAM is used for the card's BIOS or something so it's not available to the graphicsdriver.
</ul>
<p><h1>nv_driver 0.22, (Rudolf)</h1></p>
<ul>
<li>Added AGP mode capability on AGP cards along with the option to block it in nv.settings. No GART and AGP aperture support; but if your card and system AGP host bridge support the 'fastwrite' (FW) feature, you'll notice a nice speedup of unaccelerated graphics.
<ul>
<li>Tested Quake 2 in software rendering mode over here using timedemo1 with demo1.dm2: framerates jumped up to 140% of the 'original' in AGP2.0 4X mode!
<li>Also tested video playback using bitmap output mode: CPU load drops considerably depending on desktop colordepth and resolution of the video played back.<br>
<li>Also tested video playback using bitmap output mode: CPU load drops considerably depending on desktop colordepth and size of the video output window.<br>
<li>2D acceleration will not speedup because it's working 'local', so within the graphics cards engine and it's RAM only.
</ul>
<strong>Note please:</strong><br>

12
src/add-ons/kernel/drivers/graphics/nvidia/driver.c
View File

@ -789,13 +789,17 @@ static status_t open_hook (const char* name, uint32 flags, void** cookie) {
{
case 0x01a010de: /* Nvidia GeForce2 Integrated GPU */
/* device at bus #0, device #0, function #1 holds value at byte-index 0x7C */
si->ps.memory_size =
((((*pci_bus->read_pci_config)(0, 0, 1, 0x7c, 4)) & 0x000007c0) >> 6) + 1;
si->ps.memory_size = 1024 * 1024 *
(((((*pci_bus->read_pci_config)(0, 0, 1, 0x7c, 4)) & 0x000007c0) >> 6) + 1);
/* last 64kB RAM is used for the BIOS (or something else?) */
si->ps.memory_size -= (64 * 1024);
break;
case 0x01f010de: /* Nvidia GeForce4 MX Integrated GPU */
/* device at bus #0, device #0, function #1 holds value at byte-index 0x84 */
si->ps.memory_size =
((((*pci_bus->read_pci_config)(0, 0, 1, 0x84, 4)) & 0x000007f0) >> 4) + 1;
si->ps.memory_size = 1024 * 1024 *
(((((*pci_bus->read_pci_config)(0, 0, 1, 0x84, 4)) & 0x000007f0) >> 4) + 1);
/* last 64kB RAM is used for the BIOS (or something else?) */
si->ps.memory_size -= (64 * 1024);
break;
default:
/* all other cards have own RAM: the amount of which is determined in the