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fixed naming errors (mn versus nm)

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git-svn-id: file:///srv/svn/repos/haiku/trunk/current@5919 a95241bf-73f2-0310-859d-f6bbb57e9c96
This commit is contained in:
Rudolf Cornelissen 2004-01-05 19:46:10 +00:00
parent 5e4d1116bd
commit a513041013
2 changed files with 21 additions and 21 deletions
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30
headers/private/graphics/neomagic/DriverInterface.h
View File

@ -35,7 +35,7 @@ typedef struct {
#define DELETE_BEN(x) delete_sem(x.sem);
#define MN_PRIVATE_DATA_MAGIC 0x0009 /* a private driver rev, of sorts */
#define NM_PRIVATE_DATA_MAGIC 0x0009 /* a private driver rev, of sorts */
/*dualhead extensions to flags*/
#define DUALHEAD_OFF (0<<6)
@ -57,14 +57,14 @@ typedef struct {
#define SKD_HANDLER_INSTALLED 0x80000000
enum {
MN_GET_PRIVATE_DATA = B_DEVICE_OP_CODES_END + 1,
MN_GET_PCI,
MN_SET_PCI,
MN_DEVICE_NAME,
MN_RUN_INTERRUPTS,
MN_ISA_OUT,
MN_ISA_IN,
MN_PGM_BES
NM_GET_PRIVATE_DATA = B_DEVICE_OP_CODES_END + 1,
NM_GET_PCI,
NM_SET_PCI,
NM_DEVICE_NAME,
NM_RUN_INTERRUPTS,
NM_ISA_OUT,
NM_ISA_IN,
NM_PGM_BES
};
/* max. number of overlay buffers */
@ -222,7 +222,7 @@ typedef struct {
uint32 offset; /* Offset to read/write */
uint32 size; /* Number of bytes to transfer */
uint32 value; /* The value read or written */
} mn_get_set_pci;
} nm_get_set_pci;
/* Read or write a value in ISA I/O space */
typedef struct {
@ -230,7 +230,7 @@ typedef struct {
uint16 adress; /* Offset to read/write */
uint8 size; /* Number of bytes to transfer */
uint16 data; /* The value read or written */
} mn_in_out_isa;
} nm_in_out_isa;
/* setup ISA BES registers for overlay on ISA cards */
typedef struct {
@ -252,26 +252,26 @@ typedef struct {
uint8 colkey_g;
uint8 colkey_b;
uint16 ob_width;
} mn_bes_data;
} nm_bes_data;
/* Set some boolean condition (like enabling or disabling interrupts) */
typedef struct {
uint32 magic; /* magic number to make sure the caller groks us */
bool do_it; /* state to set */
} mn_set_bool_state;
} nm_set_bool_state;
/* Retrieve the area_id of the kernel/accelerant shared info */
typedef struct {
uint32 magic; /* magic number to make sure the caller groks us */
area_id shared_info_area; /* area_id containing the shared information */
} mn_get_private_data;
} nm_get_private_data;
/* Retrieve the device name. Usefull for when we have a file handle, but want
to know the device name (like when we are cloning the accelerant) */
typedef struct {
uint32 magic; /* magic number to make sure the caller groks us */
char *name; /* The name of the device, less the /dev root */
} mn_device_name;
} nm_device_name;
enum {

12
headers/private/graphics/neomagic/nm_macros.h
View File

@ -256,8 +256,8 @@
#define NM_2REG32(r_) ((vuint32 *)regs2)[(r_) >> 2]
/* read and write to PCI config space */
#define CFGR(A) (mn_pci_access.offset=NMCFG_##A, ioctl(fd,MN_GET_PCI, &mn_pci_access,sizeof(mn_pci_access)), mn_pci_access.value)
#define CFGW(A,B) (mn_pci_access.offset=NMCFG_##A, mn_pci_access.value = B, ioctl(fd,MN_SET_PCI,&mn_pci_access,sizeof(mn_pci_access)))
#define CFGR(A) (nm_pci_access.offset=NMCFG_##A, ioctl(fd,NM_GET_PCI, &nm_pci_access,sizeof(nm_pci_access)), nm_pci_access.value)
#define CFGW(A,B) (nm_pci_access.offset=NMCFG_##A, nm_pci_access.value = B, ioctl(fd,NM_SET_PCI,&nm_pci_access,sizeof(nm_pci_access)))
//old:
/* read and write from the powergraphics registers */
@ -271,10 +271,10 @@
#define CR1W(A,B) (NM_REG32(NMCR1_##A) = (B))
/* read and write from ISA I/O space */
#define ISAWB(A,B)(mn_isa_access.adress=NMISA8_##A, mn_isa_access.data = (uint8)B, mn_isa_access.size = 1, ioctl(fd,MN_ISA_OUT, &mn_isa_access,sizeof(mn_isa_access)))
#define ISAWW(A,B)(mn_isa_access.adress=NMISA16_##A, mn_isa_access.data = B, mn_isa_access.size = 2, ioctl(fd,MN_ISA_OUT, &mn_isa_access,sizeof(mn_isa_access)))
#define ISARB(A) (mn_isa_access.adress=NMISA8_##A, ioctl(fd,MN_ISA_IN, &mn_isa_access,sizeof(mn_isa_access)), (uint8)mn_isa_access.data)
#define ISARW(A) (mn_isa_access.adress=NMISA16_##A, ioctl(fd,MN_ISA_IN, &mn_isa_access,sizeof(mn_isa_access)), mn_isa_access.data)
#define ISAWB(A,B)(nm_isa_access.adress=NMISA8_##A, nm_isa_access.data = (uint8)B, nm_isa_access.size = 1, ioctl(fd,NM_ISA_OUT, &nm_isa_access,sizeof(nm_isa_access)))
#define ISAWW(A,B)(nm_isa_access.adress=NMISA16_##A, nm_isa_access.data = B, nm_isa_access.size = 2, ioctl(fd,NM_ISA_OUT, &nm_isa_access,sizeof(nm_isa_access)))
#define ISARB(A) (nm_isa_access.adress=NMISA8_##A, ioctl(fd,NM_ISA_IN, &nm_isa_access,sizeof(nm_isa_access)), (uint8)nm_isa_access.data)
#define ISARW(A) (nm_isa_access.adress=NMISA16_##A, ioctl(fd,NM_ISA_IN, &nm_isa_access,sizeof(nm_isa_access)), nm_isa_access.data)
/* read and write from ISA CRTC indexed registers */
#define ISACRTCW(A,B)(ISAWW(CRTCIND, ((NMCRTCX_##A) | ((B) << 8))))