More style fixes.
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Adrien Destugues
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948f0320c9
commit
a48beaced0
@ -83,6 +83,7 @@ print_descriptor_chain(ehci_qtd *descriptor)
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}
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}
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void
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print_queue(ehci_qh *queueHead)
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{
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@ -100,6 +101,7 @@ print_queue(ehci_qh *queueHead)
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print_descriptor_chain(queueHead->element_log);
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}
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#endif // TRACE_USB
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@ -500,8 +502,8 @@ EHCI::EHCI(pci_info *info, Stack *stack)
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for (uint32 insertIndex = interval / 2;
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insertIndex < EHCI_VFRAMELIST_ENTRIES_COUNT;
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insertIndex += interval) {
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fSitdEntries[insertIndex]->next_phy =
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fInterruptEntries[intervalIndex].queue_head.this_phy;
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fSitdEntries[insertIndex]->next_phy
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= fInterruptEntries[intervalIndex].queue_head.this_phy;
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}
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intervalIndex--;
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@ -523,8 +525,8 @@ EHCI::EHCI(pci_info *info, Stack *stack)
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firstLogical->prev_log = NULL;
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for (int32 i = 0; i < EHCI_FRAMELIST_ENTRIES_COUNT; i++) {
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fPeriodicFrameList[i] =
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fItdEntries[i & (EHCI_VFRAMELIST_ENTRIES_COUNT - 1)]->this_phy;
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fPeriodicFrameList[i]
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= fItdEntries[i & (EHCI_VFRAMELIST_ENTRIES_COUNT - 1)]->this_phy;
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TRACE("periodic entry %" B_PRId32 " linked to 0x%" B_PRIx32 "\n", i,
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fPeriodicFrameList[i]);
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}
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@ -860,7 +862,8 @@ EHCI::SubmitIsochronous(Transfer *transfer)
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| (length << EHCI_ITD_TLENGTH_SHIFT) | (pg << EHCI_ITD_PG_SHIFT)
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| (offset << EHCI_ITD_TOFFSET_SHIFT);
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itd->last_token = i;
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TRACE("isochronous filled slot %" B_PRId32 " 0x%" B_PRIx32 "\n", i, itd->token[i]);
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TRACE("isochronous filled slot %" B_PRId32 " 0x%" B_PRIx32 "\n", i,
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itd->token[i]);
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dataLength -= length;
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offset += length;
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if (dataLength > 0 && offset > 0xfff) {
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@ -875,13 +878,15 @@ EHCI::SubmitIsochronous(Transfer *transfer)
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currentPhy += (offset & 0xfff) - (currentPhy & 0xfff);
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itd->buffer_phy[0] |= (pipe->EndpointAddress() << EHCI_ITD_ENDPOINT_SHIFT)
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| (pipe->DeviceAddress() << EHCI_ITD_ADDRESS_SHIFT);
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itd->buffer_phy[1] |= (pipe->MaxPacketSize() & EHCI_ITD_MAXPACKETSIZE_MASK)
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| (directionIn << EHCI_ITD_DIR_SHIFT);
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itd->buffer_phy[2] |=
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((((pipe->MaxPacketSize() >> EHCI_ITD_MAXPACKETSIZE_LENGTH) + 1)
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& EHCI_ITD_MUL_MASK) << EHCI_ITD_MUL_SHIFT);
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itd->buffer_phy[0]
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|= (pipe->EndpointAddress() << EHCI_ITD_ENDPOINT_SHIFT)
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| (pipe->DeviceAddress() << EHCI_ITD_ADDRESS_SHIFT);
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itd->buffer_phy[1]
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|= (pipe->MaxPacketSize() & EHCI_ITD_MAXPACKETSIZE_MASK)
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| (directionIn << EHCI_ITD_DIR_SHIFT);
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itd->buffer_phy[2]
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|= ((((pipe->MaxPacketSize() >> EHCI_ITD_MAXPACKETSIZE_LENGTH) + 1)
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& EHCI_ITD_MUL_MASK) << EHCI_ITD_MUL_SHIFT);
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TRACE("isochronous filled itd buffer_phy[0,1,2] 0x%" B_PRIx32 ", 0x%"
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B_PRIx32 " 0x%" B_PRIx32 "\n",
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@ -915,7 +920,8 @@ EHCI::SubmitIsochronous(Transfer *transfer)
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fNextStartingFrame = currentFrame + 1;
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// Wake up the isochronous finisher thread
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release_sem_etc(fFinishIsochronousTransfersSem, 1 /*frameCount*/, B_DO_NOT_RESCHEDULE);
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release_sem_etc(fFinishIsochronousTransfersSem, 1 /*frameCount*/,
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B_DO_NOT_RESCHEDULE);
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return B_OK;
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}
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@ -972,7 +978,8 @@ EHCI::AddTo(Stack *stack)
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#endif
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if (!sPCIModule) {
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status_t status = get_module(B_PCI_MODULE_NAME, (module_info **)&sPCIModule);
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status_t status = get_module(B_PCI_MODULE_NAME,
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(module_info **)&sPCIModule);
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if (status < B_OK) {
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TRACE_MODULE_ERROR("getting pci module failed! 0x%08" B_PRIx32
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"\n", status);
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@ -1002,7 +1009,8 @@ EHCI::AddTo(Stack *stack)
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&& item->class_api == PCI_usb_ehci) {
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if (item->u.h0.interrupt_line == 0
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|| item->u.h0.interrupt_line == 0xFF) {
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TRACE_MODULE_ERROR("found device with invalid IRQ - check IRQ assignement\n");
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TRACE_MODULE_ERROR("found device with invalid IRQ - "
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"check IRQ assignement\n");
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continue;
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}
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@ -1264,7 +1272,8 @@ EHCI::Interrupt()
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uint32 status = ReadOpReg(EHCI_USBSTS) & EHCI_USBSTS_INTMASK;
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if ((status & fEnabledInterrupts) == 0) {
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if (status != 0) {
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TRACE("discarding not enabled interrupts 0x%08" B_PRIx32 "\n", status);
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TRACE("discarding not enabled interrupts 0x%08" B_PRIx32 "\n",
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status);
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WriteOpReg(EHCI_USBSTS, status);
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}
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@ -1634,16 +1643,16 @@ EHCI::FinishTransfers()
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break;
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}
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if (((status>>EHCI_QTD_PID_SHIFT) & EHCI_QTD_PID_MASK)
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== EHCI_QTD_PID_IN
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&& ((status>>EHCI_QTD_BYTES_SHIFT) & EHCI_QTD_BYTES_MASK)
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if (((status >> EHCI_QTD_PID_SHIFT) & EHCI_QTD_PID_MASK)
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== EHCI_QTD_PID_IN
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&& ((status >> EHCI_QTD_BYTES_SHIFT) & EHCI_QTD_BYTES_MASK)
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!=0) {
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// a short packet condition existed on this descriptor
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if (transfer->transfer->TransferPipe()->Type()
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& USB_OBJECT_CONTROL_PIPE) {
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& USB_OBJECT_CONTROL_PIPE != 0) {
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// for control pipes, the next descriptor
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// executed is the Status descriptor
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while(!(descriptor->next_phy & EHCI_ITEM_TERMINATE)) {
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while (!(descriptor->next_phy & EHCI_ITEM_TERMINATE)) {
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descriptor = descriptor->next_log;
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}
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continue;
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@ -1653,7 +1662,7 @@ EHCI::FinishTransfers()
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transferDone = true;
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break;
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}
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descriptor = descriptor->next_log;
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}
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@ -1796,8 +1805,8 @@ EHCI::Cleanup()
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int32
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EHCI::FinishIsochronousThread(void *data)
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{
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((EHCI *)data)->FinishIsochronousTransfers();
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return B_OK;
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((EHCI *)data)->FinishIsochronousTransfers();
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return B_OK;
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}
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@ -1805,9 +1814,9 @@ void
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EHCI::FinishIsochronousTransfers()
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{
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/* This thread stays one position behind the controller and processes every
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* isochronous descriptor. Once it finds the last isochronous descriptor
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* of a transfer, it processes the entire transfer.
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*/
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* isochronous descriptor. Once it finds the last isochronous descriptor
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* of a transfer, it processes the entire transfer.
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*/
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while (!fStopThreads) {
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// Go to sleep if there are not isochronous transfer to process
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if (acquire_sem(fFinishIsochronousTransfersSem) < B_OK)
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@ -2423,6 +2432,7 @@ EHCI::LinkSITDescriptors(ehci_sitd *sitd, ehci_sitd **_last)
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*_last = sitd;
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}
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void
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EHCI::UnlinkITDescriptors(ehci_itd *itd, ehci_itd **last)
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{
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@ -2621,8 +2631,8 @@ EHCI::ReadIsochronousDescriptorChain(isochronous_transfer_data *transfer)
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& EHCI_ITD_STATUS_MASK) != 0) {
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bufferSize = 0;
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}
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isochronousData->packet_descriptors[packet].actual_length =
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bufferSize;
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isochronousData->packet_descriptors[packet].actual_length
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= bufferSize;
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if (bufferSize > 0)
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isochronousData->packet_descriptors[packet].status = B_OK;
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