- use asm_def.h and FUNCTION_END

- remove some dead ppc code


git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@28023 a95241bf-73f2-0310-859d-f6bbb57e9c96
This commit is contained in:
François Revol 2008-10-13 09:25:13 +00:00
parent 099e08d534
commit 9f5e12b6b3
12 changed files with 64 additions and 390 deletions

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@ -1,5 +1,5 @@
#define FUNCTION(x) .global x; .type x,@function; x
#include <asm_defs.h>
.text
@ -8,17 +8,20 @@
FUNCTION(flush_insn_pipeline_030):
nop
rts
FUNCTION_END(flush_insn_pipeline_030)
/* flush all ATC entries */
FUNCTION(flush_atc_all_030):
pflusha
rts
FUNCTION_END(flush_atc_all_030)
/* flush ATC entries for given address */
FUNCTION(flush_atc_addr_030):
move.l (4,%a7),%a0
pflush #0,#0,(%a0)
rts
FUNCTION_END(flush_atc_addr_030)

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@ -1,5 +1,5 @@
#define FUNCTION(x) .global x; .type x,@function; x
#include <asm_defs.h>
.text
/* gas doesn't seem to get the -m arg... */
@ -9,22 +9,26 @@
FUNCTION(flush_insn_pipeline_040):
nop
rts
FUNCTION_END(flush_insn_pipeline_040)
/* flush all ATC entries */
FUNCTION(flush_atc_all_040):
pflusha
rts
FUNCTION_END(flush_atc_all_040)
/* flush all user (non-global) ATC entries */
FUNCTION(flush_atc_user_040):
pflushan
rts
FUNCTION_END(flush_atc_user_040)
/* flush ATC entries for given address */
FUNCTION(flush_atc_addr_040):
move.l (4,%a7),%a0
pflush (%a0)
rts
FUNCTION_END(flush_atc_addr_040)

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@ -8,7 +8,7 @@
#include <arch/m68k/arch_cpu.h>
#define FUNCTION(x) .global x; .type x,@function; x
#include <asm_defs.h>
.text
@ -16,12 +16,14 @@
FUNCTION(reboot):
reset
rts
FUNCTION_END(reboot)
/* void arch_int_enable_interrupts(void) */
FUNCTION(arch_int_enable_interrupts):
andi #0xf8ff,%sr
rts
FUNCTION_END(arch_int_enable_interrupts)
/* int arch_int_disable_interrupts(void)
@ -36,6 +38,7 @@ FUNCTION(arch_int_disable_interrupts):
lsr.l #8,%d0
andi.l #7,%d0
rts
FUNCTION_END(arch_int_disable_interrupts)
/* void arch_int_restore_interrupts(int oldState)
@ -50,6 +53,7 @@ FUNCTION(arch_int_restore_interrupts):
or.w %d0,%d1
move %d1,%sr
rts
FUNCTION_END(arch_int_restore_interrupts)
/* bool arch_int_are_interrupts_enabled(void) */
@ -61,12 +65,14 @@ FUNCTION(arch_int_are_interrupts_enabled):
moveq.l #1,%d0
arch_int_are_interrupts_enabled_no:
rts
FUNCTION_END(arch_int_are_interrupts_enabled)
// ToDo: fixme
FUNCTION(dbg_save_registers):
#warning M68K: implement dbx_save_registers!
rts
FUNCTION_END(dbg_save_registers)
/* long long get_time_base(void) */
@ -76,6 +82,7 @@ FUNCTION(get_time_base):
clr.l %d1
//passed through a0 or d0:d1 ?
rts
FUNCTION_END(get_time_base)
#warning M68K: FIX m68k_context_switch
@ -97,6 +104,7 @@ FUNCTION(m68k_context_switch):
//move.w (%sp)+,%sr
rts
FUNCTION_END(m68k_context_switch)
// void m68k_switch_stack_and_call(addr_t newKstack,
@ -111,6 +119,7 @@ FUNCTION(m68k_switch_stack_and_call):
jsr (%a1) // call the target function
_loop:
bra _loop
FUNCTION_END(m68k_switch_stack_and_call)
// m68k_kernel_thread_root(): parameters in r13-r15, the functions to call
@ -130,4 +139,5 @@ FUNCTION(m68k_kernel_thread_root):
// debugger (without a message at the moment).
clr.l -(%sp)
jmp kernel_debugger
FUNCTION_END(m68k_kernel_thread_root)

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@ -3,7 +3,7 @@
** Distributed under the terms of the OpenBeOS License.
*/
#define FUNCTION(x) .global x; .type x,@function; x
#include <asm_defs.h>
.text

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@ -6,12 +6,10 @@
* Distributed under the terms of the NewOS License.
*/
#include <asm_defs.h>
#include "asm_offsets.h"
#define FUNCTION(x) .global x; .type x,@function; x
#define LOCAL_FUNCTION(x) .type x,@function; x
/* General exception handling concept:
@ -89,6 +87,7 @@
/* this one just returns */
FUNCTION(__m68k_exception_noop):
rte
FUNCTION_END(__m68k_exception_noop)
/* see arch_asm.S for ctx switch */
@ -129,374 +128,6 @@ null_res_2:
movem.l (%sp)+,%d0-%d7/%a0-%a6
rte
FUNCTION_END(__m68k_exception_common)
#if 0 /* PPC */
/* code in each exception vector */
#define VEC_ENTRY() \
mtsprg1 %r1 ; /* temporarily save r1 in SPRG1 */ \
mfsprg0 %r1 ; /* ppc_cpu_exception_context* -> r1 */ \
stw %r0, 16(%r1) ; /* save r0 */ \
mflr %r0 ; /* save LR in r0 */ \
bl exception_vector_common ; /* continue with the common part */
/* defines an exception vector */
#define DEFINE_VECTOR(offset, name) \
.skip offset - (. - __irqvec_start); \
FUNCTION(name): \
VEC_ENTRY()
.global __irqvec_start
__irqvec_start:
.long 0
/* Called by the exception vector code.
* LR: Points to the end of the exception vector code we're coming from.
* r0: original LR
* r1: ppc_cpu_exception_context* (physical address)
* SPRG1: original r1
*/
exception_vector_common:
stw %r0, 20(%r1) /* save original LR */
stw %r2, 24(%r1) /* save r2 */
stw %r3, 28(%r1) /* save r3 */
/* load the virtual address of the ppc_cpu_exception_context for this CPU */
lwz %r1, 4(%r1)
/* Address translation is turned off. We map this code via BAT, turn on
address translation, and continue in the kernel proper. */
li %r0, 0x10|0x2 /* BATL_MC | BATL_PP_RW */
mtibatl 0, %r0 /* load lower word of the instruction BAT */
li %r0, 0x2 /* BEPI = 0, BL = 0 (128 KB), BATU_VS */
mtibatu 0, %r0 /* load upper word of the instruction BAT */
isync
sync
/* turn on address translation */
mfsrr1 %r0 /* load saved msr */
rlwinm %r0, %r0, 28, 30, 31 /* extract mmu bits */
mfmsr %r3 /* load the current msr */
rlwimi %r3, %r0, 4, 26, 27 /* merge the mmu bits with the current msr */
li %r0, 1
rlwimi %r3, %r0, 13, 18, 18 /* turn on FPU, too */
mtmsr %r3 /* load new msr (turning the mmu back on) */
isync
/* Get LR -- it points to the end of the exception vector code. We adjust it
to point to the beginning and can use it to identify the vector later. */
mflr %r3
subi %r3, %r3, 20 /* 5 instructions */
/* jump to kernel code (ppc_exception_tail) */
lwz %r2, 0(%r1)
mtlr %r2
blr
DEFINE_VECTOR(0x100, system_reset_exception)
DEFINE_VECTOR(0x200, machine_check_exception)
DEFINE_VECTOR(0x300, DSI_exception)
DEFINE_VECTOR(0x400, ISI_exception)
DEFINE_VECTOR(0x500, external_interrupt_exception)
DEFINE_VECTOR(0x600, alignment_exception)
DEFINE_VECTOR(0x700, program_exception)
DEFINE_VECTOR(0x800, FP_unavailable_exception)
DEFINE_VECTOR(0x900, decrementer_exception)
DEFINE_VECTOR(0xc00, system_call_exception)
DEFINE_VECTOR(0xd00, trace_exception)
DEFINE_VECTOR(0xe00, FP_assist_exception)
DEFINE_VECTOR(0xf00, perf_monitor_exception)
DEFINE_VECTOR(0xf20, altivec_unavailable_exception)
DEFINE_VECTOR(0x1000, ITLB_miss_exception)
DEFINE_VECTOR(0x1100, DTLB_miss_on_load_exception)
DEFINE_VECTOR(0x1200, DTLB_miss_on_store_exception)
DEFINE_VECTOR(0x1300, instruction_address_breakpoint_exception)
DEFINE_VECTOR(0x1400, system_management_exception)
DEFINE_VECTOR(0x1600, altivec_assist_exception)
DEFINE_VECTOR(0x1700, thermal_management_exception)
.global __irqvec_end
__irqvec_end:
/* This is where exception_vector_common continues. We're in the kernel here.
r1: ppc_cpu_exception_context* (virtual address)
r3: exception vector offset
SPRG1: original r1
*/
FUNCTION(ppc_exception_tail):
/* turn off BAT */
li %r2, 0
mtibatu 0, %r2
mtibatl 0, %r2
isync
sync
/* save CR */
mfcr %r0
mfsrr1 %r2 /* load saved msr */
andi. %r2, %r2, (1 << 14) /* see if it was in kernel mode */
beq .kernel /* yep */
/* We come from userland. Load the kernel stack top address for the current
userland thread. */
mr %r2, %r1
lwz %r1, 8(%r1)
b .restore_stack_end
.kernel:
mr %r2, %r1
mfsprg1 %r1
.restore_stack_end:
/* now r2 points to the ppc_cpu_exception_context, r1 to the kernel stack */
/* restore the CR, it was messed up in the previous compare */
mtcrf 0xff, %r0
/* align r1 to 8 bytes, so the iframe will be aligned too */
rlwinm %r1, %r1, 0, 0, 28
/* save the registers */
bl __save_regs
/* iframe pointer to r4 and a backup to r20 */
mr %r4, %r1
mr %r20, %r1
/* adjust the stack pointer for ABI compatibility */
subi %r1, %r1, 8 /* make sure there's space for the previous
frame pointer and the return address */
rlwinm %r1, %r1, 0, 0, 27 /* 16 byte align the stack pointer */
li %r0, 0
stw %r0, 0(%r1) /* previous frame pointer: NULL */
/* 4(%r1) is room for the return address to be filled in by the
called function. */
/* r3: exception vector offset
r4: iframe pointer */
bl ppc_exception_entry
/* move the iframe to r1 */
mr %r1, %r20
b __restore_regs_and_rfi
/* called by ppc_exception_tail
* register expectations:
* r1: stack
* r2: ppc_cpu_exception_context*
* SPRG1: original r1
* r0,r3, LR: scrambled, but saved in scratch memory
* all other regs should have been unmodified by the exception handler,
* and ready to be saved
*/
__save_regs:
/* Note: The iframe must be 8 byte aligned. The stack pointer we are passed
in r1 is aligned. So we store the floating point registers first and
need to take care that an even number of 4 byte registers is stored,
or insert padding respectively. */
/* push f0-f31 */
stfdu %f0, -8(%r1)
stfdu %f1, -8(%r1)
stfdu %f2, -8(%r1)
stfdu %f3, -8(%r1)
stfdu %f4, -8(%r1)
stfdu %f5, -8(%r1)
stfdu %f6, -8(%r1)
stfdu %f7, -8(%r1)
stfdu %f8, -8(%r1)
stfdu %f9, -8(%r1)
stfdu %f10, -8(%r1)
stfdu %f11, -8(%r1)
stfdu %f12, -8(%r1)
stfdu %f13, -8(%r1)
stfdu %f14, -8(%r1)
stfdu %f15, -8(%r1)
stfdu %f16, -8(%r1)
stfdu %f17, -8(%r1)
stfdu %f18, -8(%r1)
stfdu %f19, -8(%r1)
stfdu %f20, -8(%r1)
stfdu %f21, -8(%r1)
stfdu %f22, -8(%r1)
stfdu %f23, -8(%r1)
stfdu %f24, -8(%r1)
stfdu %f25, -8(%r1)
stfdu %f26, -8(%r1)
stfdu %f27, -8(%r1)
stfdu %f28, -8(%r1)
stfdu %f29, -8(%r1)
stfdu %f30, -8(%r1)
stfdu %f31, -8(%r1)
/* push r0-r3 */
lwz %r0, 16(%r2) /* original r0 */
stwu %r0, -4(%r1) /* push r0 */
mfsprg1 %r0 /* original r1 */
stwu %r0, -4(%r1) /* push r1 */
lwz %r0, 24(%r2) /* original r2 */
stwu %r0, -4(%r1) /* push r2 */
lwz %r0, 28(%r2) /* original r3 */
stwu %r0, -4(%r1) /* push r3 */
/* push r4-r31 */
stwu %r4, -4(%r1)
stwu %r5, -4(%r1)
stwu %r6, -4(%r1)
stwu %r7, -4(%r1)
stwu %r8, -4(%r1)
stwu %r9, -4(%r1)
stwu %r10, -4(%r1)
stwu %r11, -4(%r1)
stwu %r12, -4(%r1)
stwu %r13, -4(%r1)
stwu %r14, -4(%r1)
stwu %r15, -4(%r1)
stwu %r16, -4(%r1)
stwu %r17, -4(%r1)
stwu %r18, -4(%r1)
stwu %r19, -4(%r1)
stwu %r20, -4(%r1)
stwu %r21, -4(%r1)
stwu %r22, -4(%r1)
stwu %r23, -4(%r1)
stwu %r24, -4(%r1)
stwu %r25, -4(%r1)
stwu %r26, -4(%r1)
stwu %r27, -4(%r1)
stwu %r28, -4(%r1)
stwu %r29, -4(%r1)
stwu %r30, -4(%r1)
stwu %r31, -4(%r1)
/* save some of the other regs */
mffs %f0
stfsu %f0, -4(%r1) /* push FPSCR */
mfctr %r0
stwu %r0, -4(%r1) /* push CTR */
mfxer %r0
stwu %r0, -4(%r1) /* push XER */
mfcr %r0
stwu %r0, -4(%r1) /* push CR */
lwz %r0, 20(%r2) /* original LR */
stwu %r0, -4(%r1) /* push LR */
mfspr %r0, %dsisr
stwu %r0, -4(%r1) /* push DSISR */
mfspr %r0, %dar
stwu %r0, -4(%r1) /* push DAR */
mfspr %r0, %srr1
stwu %r0, -4(%r1) /* push SRR1 */
mfspr %r0, %srr0
stwu %r0, -4(%r1) /* push SRR0 */
stwu %r3, -4(%r1) /* exception vector offset */
blr
/* called at the tail end of each of the exceptions
* r1: iframe pointer
*/
__restore_regs_and_rfi:
lwzu %r0, 4(%r1) /* SRR0 (skip vector offset) */
mtspr %srr0, %r0
lwzu %r0, 4(%r1) /* SRR1 */
mtspr %srr1, %r0
lwzu %r0, 4(%r1) /* DAR */
mtspr %dar, %r0
lwzu %r0, 4(%r1) /* DSISR */
mtspr %dsisr, %r0
lwzu %r0, 4(%r1) /* LR */
mtlr %r0
lwzu %r0, 4(%r1) /* CR */
mtcr %r0
lwzu %r0, 4(%r1) /* XER */
mtxer %r0
lwzu %r0, 4(%r1) /* CTR */
mtctr %r0
lfsu %f0, 4(%r1) /* FPSCR */
mtfsf 0xff, %f0
lwzu %r31, 4(%r1)
lwzu %r30, 4(%r1)
lwzu %r29, 4(%r1)
lwzu %r28, 4(%r1)
lwzu %r27, 4(%r1)
lwzu %r26, 4(%r1)
lwzu %r25, 4(%r1)
lwzu %r24, 4(%r1)
lwzu %r23, 4(%r1)
lwzu %r22, 4(%r1)
lwzu %r21, 4(%r1)
lwzu %r20, 4(%r1)
lwzu %r19, 4(%r1)
lwzu %r18, 4(%r1)
lwzu %r17, 4(%r1)
lwzu %r16, 4(%r1)
lwzu %r15, 4(%r1)
lwzu %r14, 4(%r1)
lwzu %r13, 4(%r1)
lwzu %r12, 4(%r1)
lwzu %r11, 4(%r1)
lwzu %r10, 4(%r1)
lwzu %r9, 4(%r1)
lwzu %r8, 4(%r1)
lwzu %r7, 4(%r1)
lwzu %r6, 4(%r1)
lwzu %r5, 4(%r1)
lwzu %r4, 4(%r1)
lwzu %r3, 4(%r1)
/* Stop here, before we overwrite r1, and continue with the floating point
registers first. */
addi %r2, %r1, 16 /* skip r3-r0 */
/* f31-f0 */
lfd %f31, 0(%r2)
lfdu %f30, 8(%r2)
lfdu %f29, 8(%r2)
lfdu %f28, 8(%r2)
lfdu %f27, 8(%r2)
lfdu %f26, 8(%r2)
lfdu %f25, 8(%r2)
lfdu %f24, 8(%r2)
lfdu %f23, 8(%r2)
lfdu %f22, 8(%r2)
lfdu %f21, 8(%r2)
lfdu %f20, 8(%r2)
lfdu %f19, 8(%r2)
lfdu %f18, 8(%r2)
lfdu %f17, 8(%r2)
lfdu %f16, 8(%r2)
lfdu %f15, 8(%r2)
lfdu %f14, 8(%r2)
lfdu %f13, 8(%r2)
lfdu %f12, 8(%r2)
lfdu %f11, 8(%r2)
lfdu %f10, 8(%r2)
lfdu %f9, 8(%r2)
lfdu %f8, 8(%r2)
lfdu %f7, 8(%r2)
lfdu %f6, 8(%r2)
lfdu %f5, 8(%r2)
lfdu %f4, 8(%r2)
lfdu %f3, 8(%r2)
lfdu %f2, 8(%r2)
lfdu %f1, 8(%r2)
lfd %f0, 8(%r2)
/* r2-r0 */
lwzu %r2, 4(%r1)
lwz %r0, 8(%r1)
lwz %r1, 4(%r1)
/* return from interrupt */
rfi
#endif /* PPC */

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@ -3,6 +3,8 @@
** Distributed under the terms of the OpenBeOS License.
*/
#include <asm_defs.h>
/*
* gcc/config/m68k/m68k.h:CALL_USED_REGISTERS:
* d0,d1,a0,a1 are scratch regs, not to be saved.
@ -16,8 +18,6 @@
* have any SMP Amiga anyway it should be ok.
*/
#define FUNCTION(x) .global x; .type x,@function; x
.text
/* int atomic_add(int *value, int increment)
@ -31,6 +31,7 @@ miss1: move.l %d0,%d1
bne miss1
// d0 = old value
rts
FUNCTION_END(atomic_add)
/* int atomic_and(int *value, int andValue)
*/
@ -43,6 +44,7 @@ miss2: move.l %d0,%d1
bne miss2
// d0 = old value
rts
FUNCTION_END(atomic_and)
/* int atomic_or(int *value, int orValue)
*/
@ -54,6 +56,7 @@ miss3: move.l %d0,%d1
cas.l %d0,%d1,(%a0)
bne miss3
rts
FUNCTION_END(atomic_or)
/* int atomic_set(int *value, int setTo)
*/
@ -64,6 +67,7 @@ FUNCTION(atomic_set):
miss4: cas.l %d0,%d1,(%a0)
bne miss4
rts
FUNCTION_END(atomic_set)
/* int atomic_test_and_set(int *value, int setTo, int testValue)
*/
@ -73,6 +77,7 @@ FUNCTION(atomic_test_and_set):
move.l (12,%a7),%d0
cas.l %d0,%d1,(%a0)
rts
FUNCTION_END(atomic_test_and_set)
/* int atomic_get(int *value)
*/
@ -84,6 +89,7 @@ FUNCTION(atomic_get):
// we must use cas... so we change to the same value if matching,
// else we get the correct one anyway
rts
FUNCTION_END(atomic_get)
/* m68k elf convention is to return structs in (a0)
* but use d0/d1 for int64 and small structs.
@ -110,6 +116,7 @@ miss5: // old value
// return value d0:d1
movem.l (%a7)+,%d2-%d3/%a2
rts
FUNCTION_END(atomic_add64)
/* int64 atomic_and64(vint64 *value, int64 andValue) */
FUNCTION(atomic_and64):
@ -129,6 +136,7 @@ miss6: // old value
// return value d0:d1
movem.l (%a7)+,%d2-%d3/%a2
rts
FUNCTION_END(atomic_and64)
/* int64 atomic_or64(vint64 *value, int64 orValue) */
FUNCTION(atomic_or64):
@ -148,6 +156,7 @@ miss7: // old value
// return value d0:d1
movem.l (%a7)+,%d2-%d3/%a2
rts
FUNCTION_END(atomic_or64)
/* int64 atomic_set64(vint64 *value, int64 newValue) */
FUNCTION(atomic_set64):
@ -165,6 +174,7 @@ miss8: cas2.l %d0:%d1,%d2:%d3,(%a2):(%a1)
// return value d0:d1
movem.l (%a7)+,%d2-%d3/%a2
rts
FUNCTION_END(atomic_set64)
/* int64 atomic_test_and_set64(vint64 *value, int64 newValue, int64 testAgainst) */
FUNCTION(atomic_test_and_set64):
@ -181,6 +191,7 @@ FUNCTION(atomic_test_and_set64):
// return value d0:d1
movem.l (%a7)+,%d2-%d3/%a2
rts
FUNCTION_END(atomic_test_and_set64)
/* int64 atomic_get64(vint64 *value) */
FUNCTION(atomic_get64):
@ -197,4 +208,4 @@ FUNCTION(atomic_get64):
// return value
movem.l (%a7)+,%d2-%d3/%a2
rts
FUNCTION_END(atomic_get64)

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@ -3,7 +3,7 @@
** Distributed under the terms of the OpenBeOS License.
*/
#define FUNCTION(x) .global x; .type x,@function; x
#include <asm_defs.h>
.text
@ -18,7 +18,7 @@ FUNCTION(__swap_int16):
lsl.w #8,%d0
move.b %d1,%d0
rts
FUNCTION_END(__swap_int16)
/* uint32 __swap_int32(uint32 value)
*/
@ -32,7 +32,7 @@ FUNCTION(__swap_int32):
lsl.l #8,%d0
move.b (4,%a7),%d0
rts
FUNCTION_END(__swap_int32)
/* uint64 __swap_int64(uint64 value)
*/
@ -54,7 +54,7 @@ FUNCTION(__swap_int64):
lsl.l #8,%d0
move.b (8,%a7),%d0
rts
FUNCTION_END(__swap_int64)
/* TODO: The following functions can surely be optimized. A simple optimization
* would be to define macros with the contents of the __swap_int{32,64}
@ -66,7 +66,7 @@ FUNCTION(__swap_int64):
FUNCTION(__swap_float):
jmp __swap_int32
//rts
FUNCTION_END(__swap_float)
/* double __swap_double(double value)
@ -74,4 +74,6 @@ FUNCTION(__swap_float):
FUNCTION(__swap_double):
jmp __swap_int32
//rts
//XXX:check sizeof(double)
#warning M68K: XXX:check sizeof(double)
FUNCTION_END(__swap_double)

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@ -3,7 +3,7 @@
** Distributed under the terms of the OpenBeOS License.
*/
#define FUNCTION(x) .global x; .type x,@function; x
#include <asm_defs.h>
.text
@ -12,4 +12,4 @@
FUNCTION(__m68k_get_time_base):
#warning M68K: implement __m68k_get_time_base()
rts
FUNCTION_END(__m68k_get_time_base)

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@ -1,5 +1,7 @@
SubDir HAIKU_TOP src system libroot posix arch m68k ;
UsePrivateSystemHeaders ;
local genericSources =
setjmp_save_sigs.c
longjmp_return.c

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@ -3,6 +3,8 @@
* reserved. Distributed under the terms of the Haiku License.
*/
#include <asm_defs.h>
#include "setjmp_internal.h"
/* int __siglongjmp(jmp_buf buffer, int value) */
@ -22,5 +24,8 @@ FUNCTION(_longjmp):
move.l (JMP_REGS_PC,%a0),(%a7)
jmp __longjmp_return
FUNCTION_END(siglongjmp)
FUNCTION_END(longjmp)
FUNCTION_END(_longjmp)
#pragma weak longjmp=siglongjmp

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@ -3,6 +3,8 @@
* reserved. Distributed under the terms of the Haiku License.
*/
#include <asm_defs.h>
#include "setjmp_internal.h"
/* int sigsetjmp(jmp_buf buffer, int saveMask) */
@ -25,6 +27,8 @@ FUNCTION(sigsetjmp):
#warning M68K: check this.
jmp __setjmp_save_sigs
FUNCTION_END(__sigsetjmp)
FUNCTION_END(sigsetjmp)
/* int setjmp(jmp_buf buffer) */
@ -36,6 +40,6 @@ FUNCTION(setjmp):
move.l %a0,-(%a7)
// call __sigsetjmp with saveMask = 0
jmp __sigsetjmp
FUNCTION_END(setjmp)
#pragma weak _setjmp=setjmp

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@ -3,9 +3,10 @@
** Distributed under the terms of the NewOS License.
*/
#include <asm_defs.h>
#warning M68K: optimize memcpy
#if 1
#define FUNCTION(x) .global x; .type x,@function; x
/* that should be enough for now */
@ -24,4 +25,5 @@ _memcpy_out:
move.l (4,%a7),%a0
move.l %a0,%d0
rts
FUNCTION_END(memcpy)
#endif