various fixes tested on NM2070 (works now)
git-svn-id: file:///srv/svn/repos/haiku/trunk/current@7170 a95241bf-73f2-0310-859d-f6bbb57e9c96
This commit is contained in:
Rudolf Cornelissen
parent
f6dc8f8d6b
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9eaaf46fba
@ -3,7 +3,7 @@
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This file may be used under the terms of the Be Sample Code License.
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Other authors:
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Rudolf Cornelissen 4/2003-3/2004
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Rudolf Cornelissen 4/2003-4/2004
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*/
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#define MODULE_BIT 0x00200000
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@ -73,6 +73,9 @@ status_t SET_DISPLAY_MODE(display_mode *mode_to_set)
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/* disable interrupts using the kernel driver */
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interrupt_enable(false);
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/* make sure the card's registers are unlocked (KB output select may lock!) */
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nm_unlock();
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/* find current DPMS state, then turn off screen(s) */
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nm_crtc_dpms_fetch(&display, &h, &v);
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nm_crtc_dpms(false, false, false);
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@ -1,6 +1,6 @@
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/* CTRC functionality */
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/* Author:
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Rudolf Cornelissen 4/2003-3/2004
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Rudolf Cornelissen 4/2003-4/2004
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*/
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#define MODULE_BIT 0x00040000
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@ -179,7 +179,7 @@ status_t nm_crtc_set_timing(display_mode target, bool crt_only)
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ISACRTCW(VDISPE, (vdisp_e & 0xff));
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ISACRTCW(VBLANKS, (vblnk_s & 0xff));
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ISACRTCW(VBLANKE, (vblnk_e & 0xff));
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//linux:
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//linux: (BIOSmode)
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// regp->CRTC[23] = 0xC3;
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ISACRTCW(LINECOMP, (linecomp & 0xff));
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@ -262,7 +262,7 @@ status_t nm_crtc_set_timing(display_mode target, bool crt_only)
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ISACRTCW(MAXSCLIN, (temp | ((linecomp & 0x200) >> (9 - 6))));
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ISACRTCW(VDISPE, (vdisp_e & 0xff));
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//linux:
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//linux:(BIOSmode)
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// regp->CRTC[23] = 0xC3;
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ISACRTCW(LINECOMP, (linecomp & 0xff));
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@ -286,6 +286,48 @@ status_t nm_crtc_set_timing(display_mode target, bool crt_only)
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}
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}
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/* program 'fixed' mode if needed */
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if (si->ps.card_type != NM2070)
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{
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uint8 width;
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temp = ISAGRPHR(PANELCTRL1);
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/* we need to wait a bit or the card will mess-up it's register values.. */
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snooze(10);
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switch (target.timing.h_display)
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{
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case 1280:
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width = (3 << 5);
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break;
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case 1024:
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width = (2 << 5);
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break;
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case 800:
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width = (1 << 5);
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break;
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case 640:
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default: //fixme: non-std modes should be in between above modes?!?
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width = (0 << 5);
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break;
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}
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switch (si->ps.card_type)
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{
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case NM2090:
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case NM2093:
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case NM2097:
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case NM2160:
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//fixme: checkout b6????
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ISAGRPHW(PANELCTRL1, ((temp & ~0x20) | (width & 0x20)));
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break;
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default:
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/* NM2200 and later */
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ISAGRPHW(PANELCTRL1, ((temp & ~0x60) | (width & 0x60)));
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break;
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}
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}
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return B_OK;
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}
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@ -409,7 +451,8 @@ status_t nm_crtc_set_display_pitch()
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//fixme: test for max supported pitch if possible,
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//not all bits below will be implemented.
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//NM2160: confirmed b0 and b1 in register below to exist and work.
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ISAGRPHW(CRTC_PITCHE, ((offset & 0xff00) >> 8));
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if (si->ps.card_type != NM2070)
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ISAGRPHW(CRTC_PITCHE, ((offset & 0xff00) >> 8));
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return B_OK;
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}
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@ -460,6 +503,9 @@ status_t nm_crtc_set_display_start(uint32 startadd,uint8 bpp)
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/* setup centering mode for current internal or simultaneous flatpanel mode */
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status_t nm_crtc_center(display_mode target)
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{
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/* note:
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* NM2070 apparantly doesn't support horizontal centering this way... */
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uint8 vcent1, vcent2, vcent3, vcent4, vcent5;
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uint8 hcent1, hcent2, hcent3, hcent4, hcent5;
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uint8 ctrl2, ctrl3;
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@ -478,7 +524,6 @@ status_t nm_crtc_center(display_mode target)
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/* adjust for register contraints:
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* horizontal center granularity is 16 pixels */
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hoffset = ((hoffset >> 4) - 1);
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//fixme: what does this do?
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/* turn on horizontal centering? */
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ctrl3 = 0x10;
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}
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@ -489,7 +534,6 @@ status_t nm_crtc_center(display_mode target)
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/* adjust for register contraints:
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* vertical center granularity is 2 pixels */
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voffset = ((voffset >> 1) - 2);
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//fixme: what does this do?
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/* turn on vertical centering? */
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ctrl2 = 0x01;
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}
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@ -1,5 +1,5 @@
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/* Author:
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Rudolf Cornelissen 4/2003-3/2004
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Rudolf Cornelissen 4/2003-4/2004
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*/
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#define MODULE_BIT 0x00008000
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@ -47,7 +47,7 @@ status_t nm_general_powerup()
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{
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status_t status;
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LOG(1,("POWERUP: Neomagic (open)BeOS Accelerant 0.06-7 running.\n"));
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LOG(1,("POWERUP: Neomagic (open)BeOS Accelerant 0.06-8 running.\n"));
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/* detect card type and power it up */
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switch(CFGR(DEVID))
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@ -151,6 +151,12 @@ status_t nm_set_cas_latency()
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return B_ERROR;
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}
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void nm_unlock()
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{
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/* unlock cards GRAPHICS registers (any other value than 0x26 should lock it again) */
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ISAGRPHW(GRPHXLOCK, 0x26);
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}
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static status_t nmxxxx_general_powerup()
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{
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uint8 temp;
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@ -178,7 +184,7 @@ static status_t nmxxxx_general_powerup()
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dump_specs();
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/* activate PCI access: b7 = framebuffer, b6 = registers */
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ISAGRPHW(IFACECTRL, 0xc0);
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ISAGRPHW(IFACECTRL2, 0xc0);
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/* disable VGA-mode cursor (just to be sure) */
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ISACRTCW(VGACURCTRL, 0x00);
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@ -310,6 +316,8 @@ uint8 nm_general_output_read()
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static
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status_t nm_general_bios_to_powergraphics()
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{
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uint8 temp;
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LOG(2, ("INIT: Skipping card coldstart!\n"));
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/* turn off display */
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@ -322,7 +330,9 @@ status_t nm_general_bios_to_powergraphics()
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* switch to graphics mode ... */
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ISASEQW(MEMMODE, 0x0e);
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/* ... disable bitplane tweaking ... */
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ISAGRPHW(ENSETRESET, 0x00);
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/* note:
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* NeoMagic cards have custom b4-b7 use in this register! */
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ISAGRPHW(ENSETRESET, 0x80);
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/* ... no logical function tweaking with display data, no data rotation ... */
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ISAGRPHW(DATAROTATE, 0x00);
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/* ... reset read map select to plane 0 ... */
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@ -342,8 +352,14 @@ status_t nm_general_bios_to_powergraphics()
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ISAATBW(COLPLANE_EN, 0x0f);
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/* ... reset horizontal pixelpanning ... */
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ISAATBW(HORPIXPAN, 0x00);
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/* ... and reset colorpalette groupselect bits. */
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/* ... reset colorpalette groupselect bits ... */
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ISAATBW(COLSEL, 0x00);
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/* ... do unknown standard VGA register ... */
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/* note:
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* NeoMagic cards have custom b6 use in this register! */
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ISAATBW(0x16, 0x01);
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/* ... and enable all four byteplanes. */
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ISASEQW(MAPMASK, 0x0f);
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/* setup sequencer clocking mode */
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ISASEQW(CLKMODE, 0x21);
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@ -351,6 +367,16 @@ status_t nm_general_bios_to_powergraphics()
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/* enable memory above 256Kb: set b4 (disables adress wraparound at 256Kb boundary) */
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ISAGRPHW(FBSTADDE, 0x10);
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/* this register has influence on the CRTC framebuffer offset, so reset! */
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//fixme: investigate further...
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ISAGRPHW(0x15, 0x00);
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/* enable fast PCI write bursts (b4-5) */
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temp = ((ISAGRPHR(IFACECTRL1) & 0x0f) | 0x30);
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/* we need to wait a bit or the card will mess-up it's register values.. */
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snooze(10);
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ISAGRPHW(IFACECTRL1, temp);
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/* this speeds up RAM writes according to XFree driver */
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// fixme: don't touch until more is known: part of RAM or CORE PLL???
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// ISAGRPHW(SPEED, 0xc0);
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@ -1,6 +1,7 @@
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/*general card functions*/
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status_t nm_general_powerup(void);
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status_t nm_set_cas_latency(void);
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void nm_unlock(void);
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status_t nm_general_output_select(void);
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uint8 nm_general_output_read(void);
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status_t nm_general_dac_select(int);
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