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intel_extreme: Fix PCH_PANEL STS/CTL register location and define more

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This commit is contained in:
Alexander von Gluck IV 2015-11-04 17:29:06 -06:00
parent c9117774b2
commit 9cd46c7372
1 changed files with 5 additions and 2 deletions
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7
headers/private/graphics/intel_extreme/intel_extreme.h
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@ -622,8 +622,11 @@ struct intel_free_graphics_memory {
#define INTEL_PANEL_FIT_RATIOS (0x1234 | REGS_NORTH_PIPE_AND_PORT)
// LVDS on IronLake and up
#define PCH_PANEL_CONTROL (0x7200 | REGS_SOUTH_SHARED)
#define PCH_PANEL_STATUS (0x7204 | REGS_SOUTH_SHARED)
#define PCH_PANEL_STATUS (0x7200 | REGS_SOUTH_SHARED)
#define PCH_PANEL_CONTROL (0x7204 | REGS_SOUTH_SHARED)
#define PCH_PANEL_ON_DELAYS (0x7208 | REGS_SOUTH_SHARED)
#define PCH_PANEL_OFF_DELAYS (0x720c | REGS_SOUTH_SHARED)
#define PCH_PANEL_DIVISOR (0x7210 | REGS_SOUTH_SHARED)
#define PANEL_REGISTER_UNLOCK (0xabcd << 16)
#define PCH_LVDS_DETECTED (1 << 1)