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kernel/arm/paging: adjust page table entry flags

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Map physical memory by default as Normal Memory,
Outer and Inner Write-Back, no Write-Allocate

This corresponds to the following flags:
TEX=0, B=1, C=1

AP flags are not filled in at this point
as access permissions are not enforced.

see also ARM Architecture Reference Manual, section B3.8.2,
Short-descriptor format memory region attributes, without TEX remap

Change-Id: I90bc95a8feb9f22583d41135f4cbd03489fd1b72
Reviewed-on: https://review.haiku-os.org/c/haiku/+/5230
Reviewed-by: Fredrik Holmqvist <fredrik.holmqvist@gmail.com>
This commit is contained in:
David Karoly 2022-04-22 12:02:51 +02:00 committed by Fredrik Holmqvist
parent be7333a8d7
commit 9b592446a0
1 changed files with 4 additions and 2 deletions
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6
src/system/kernel/arch/arm/paging/32bit/ARMPagingMethod32Bit.cpp
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@ -181,7 +181,8 @@ ARMPagingMethod32Bit::PhysicalPageSlotPool::Map(phys_addr_t physicalAddress,
page_table_entry& pte = fPageTable[
(virtualAddress - fVirtualBase) / B_PAGE_SIZE];
pte = (physicalAddress & ARM_PTE_ADDRESS_MASK)
| ARM_MMU_L2_TYPE_SMALLEXT;
| ARM_MMU_L2_TYPE_SMALLNEW
| ARM_MMU_L2_FLAG_B | ARM_MMU_L2_FLAG_C;
arch_cpu_invalidate_TLB_range(virtualAddress, virtualAddress + B_PAGE_SIZE);
// invalidate_TLB(virtualAddress);
@ -508,7 +509,8 @@ ARMPagingMethod32Bit::PutPageTableEntryInTable(page_table_entry* entry,
bool globalPage)
{
page_table_entry page = (physicalAddress & ARM_PTE_ADDRESS_MASK)
| ARM_MMU_L2_TYPE_SMALLEXT;
| ARM_MMU_L2_TYPE_SMALLNEW
| ARM_MMU_L2_FLAG_B | ARM_MMU_L2_FLAG_C;
#if 0 //IRA
| X86_PTE_PRESENT | (globalPage ? X86_PTE_GLOBAL : 0)
| MemoryTypeToPageTableEntryFlags(memoryType);