A few x86_64 debugger fixes + style fixes.

This commit is contained in:
Alex Smith 2012-12-20 19:24:04 +00:00
parent 6c6fcaf95b
commit 9a538a294c
3 changed files with 16 additions and 14 deletions

View File

@ -53,6 +53,7 @@ static const int32 kFromDwarfRegisters[] = {
-1, -1, -1, -1, -1, -1, -1, -1, // SSE
-1, -1, -1, -1, -1, -1, -1, -1 // MMX
};
static const int32 kFromDwarfRegisterCount = sizeof(kFromDwarfRegisters) / 4;
@ -216,6 +217,7 @@ ArchitectureX86::InitRegisterRules(CfaContext& context) const
return B_OK;
}
status_t
ArchitectureX86::GetDwarfRegisterMaps(RegisterMap** _toDwarf,
RegisterMap** _fromDwarf) const

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@ -46,7 +46,7 @@ static const int32 kFromDwarfRegisters[] = {
X86_64_REGISTER_R13,
X86_64_REGISTER_R14,
X86_64_REGISTER_R15,
-1
X86_64_REGISTER_RIP,
-1, -1, -1, -1, -1, -1, -1, -1, // xmm0-xmm7
-1, -1, -1, -1, -1, -1, -1, -1, // xmm8-xmm15
-1, -1, -1, -1, -1, -1, -1, -1, // st0-st7
@ -59,6 +59,7 @@ static const int32 kFromDwarfRegisters[] = {
X86_64_REGISTER_FS,
X86_64_REGISTER_GS,
};
static const int32 kFromDwarfRegisterCount = sizeof(kFromDwarfRegisters) / 4;
@ -157,18 +158,18 @@ ArchitectureX8664::Init()
REGISTER_TYPE_GENERAL_PURPOSE, false);
_AddIntegerRegister(X86_64_REGISTER_RSI, "rsi", B_UINT64_TYPE,
REGISTER_TYPE_GENERAL_PURPOSE, true);
REGISTER_TYPE_GENERAL_PURPOSE, false);
_AddIntegerRegister(X86_64_REGISTER_RDI, "rdi", B_UINT64_TYPE,
REGISTER_TYPE_GENERAL_PURPOSE, true);
REGISTER_TYPE_GENERAL_PURPOSE, false);
_AddIntegerRegister(X86_64_REGISTER_R8, "r8", B_UINT64_TYPE,
REGISTER_TYPE_GENERAL_PURPOSE, true);
REGISTER_TYPE_GENERAL_PURPOSE, false);
_AddIntegerRegister(X86_64_REGISTER_R9, "r9", B_UINT64_TYPE,
REGISTER_TYPE_GENERAL_PURPOSE, true);
REGISTER_TYPE_GENERAL_PURPOSE, false);
_AddIntegerRegister(X86_64_REGISTER_R10, "r10", B_UINT64_TYPE,
REGISTER_TYPE_GENERAL_PURPOSE, true);
REGISTER_TYPE_GENERAL_PURPOSE, false);
_AddIntegerRegister(X86_64_REGISTER_R11, "r11", B_UINT64_TYPE,
REGISTER_TYPE_GENERAL_PURPOSE, true);
REGISTER_TYPE_GENERAL_PURPOSE, false);
_AddIntegerRegister(X86_64_REGISTER_R12, "r12", B_UINT64_TYPE,
REGISTER_TYPE_GENERAL_PURPOSE, true);
_AddIntegerRegister(X86_64_REGISTER_R13, "r13", B_UINT64_TYPE,
@ -232,15 +233,14 @@ ArchitectureX8664::InitRegisterRules(CfaContext& context) const
if (error != B_OK)
return error;
// set up rule for EIP register
// FIXME: Huh? x86_64's DWARF spec doesn't seem to include RIP in the
// register mapping? Does this matter?
//context.RegisterRule(fToDwarfRegisterMap->MapRegisterIndex(
// X86_REGISTER_EIP))->SetToLocationOffset(-4);
// set up rule for RIP register
context.RegisterRule(fToDwarfRegisterMap->MapRegisterIndex(
X86_64_REGISTER_RIP))->SetToLocationOffset(0);
return B_OK;
}
status_t
ArchitectureX8664::GetDwarfRegisterMaps(RegisterMap** _toDwarf,
RegisterMap** _fromDwarf) const

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@ -592,8 +592,8 @@ DwarfImageDebugInfo::CreateFrame(Image* image,
const Register* reg = registers + i;
BVariant value;
if (previousCpuState->GetRegisterValue(reg, value)) {
TRACE_CFI(" %3s: %#" B_PRIx32 "\n", reg->Name(),
value.ToUInt32());
TRACE_CFI(" %3s: %#" B_PRIx64 "\n", reg->Name(),
value.ToUInt64());
} else
TRACE_CFI(" %3s: undefined\n", reg->Name());
}