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pch_i2c: bail out if BAR isn't configured

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Change-Id: If271dc01bade8a5fcf28c7a3e734d573c0008b04
Reviewed-on: https://review.haiku-os.org/c/haiku/+/4883
Reviewed-by: Adrien Destugues <pulkomandy@gmail.com>
Tested-by: Commit checker robot <no-reply+buildbot@haiku-os.org>
This commit is contained in:
Jérôme Duval 2022-01-24 11:27:20 +01:00 committed by waddlesplash
parent 789bcfd8de
commit 971ad09095
3 changed files with 10 additions and 4 deletions
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4
src/add-ons/kernel/busses/i2c/pch_i2c.cpp
View File

@ -403,7 +403,7 @@ init_bus(device_node* node, void** bus_cookie)
gDeviceManager->get_driver(parent, &driver, (void**)&bus);
gDeviceManager->put_node(parent);
TRACE_ALWAYS("init_bus() addr 0x%" B_PRIxPHYSADDR " size 0x%" B_PRIxSIZE
TRACE_ALWAYS("init_bus() addr 0x%" B_PRIxPHYSADDR " size 0x%" B_PRIx64
" irq 0x%x\n", bus->base_addr, bus->map_size, bus->irq);
bus->registersArea = map_physical_memory("PCHI2C memory mapped registers",
@ -412,7 +412,7 @@ init_bus(device_node* node, void** bus_cookie)
(void **)&bus->registers);
// init bus
bus->capabilities = read32(bus->registers + PCH_SUP_CAPABLITIES);
TRACE_ALWAYS("init_bus() 0x%x (0x%" B_PRIx32 ")\n",
TRACE_ALWAYS("init_bus() 0x%" B_PRIx32 " (0x%" B_PRIx32 ")\n",
(bus->capabilities >> PCH_SUP_CAPABLITIES_TYPE_SHIFT)
& PCH_SUP_CAPABLITIES_TYPE_MASK,
bus->capabilities);

2
src/add-ons/kernel/busses/i2c/pch_i2c.h
View File

@ -72,7 +72,7 @@ typedef enum {
typedef struct {
phys_addr_t base_addr;
size_t map_size;
uint64 map_size;
uint8 irq;
i2c_bus sim;

8
src/add-ons/kernel/busses/i2c/pch_i2c_pci.cpp
View File

@ -131,12 +131,18 @@ init_device(device_node* node, void** device_cookie)
pci->get_pci_info(device, pciInfo);
bus->info.base_addr = pciInfo->u.h0.base_registers[0];
bus->info.map_size = pciInfo->u.h0.base_register_sizes[0];
if ((pciInfo->u.h0.base_register_flags[0] & PCI_address_type)
== PCI_address_type_64) {
bus->info.base_addr |= (uint64)pciInfo->u.h0.base_registers[1] << 32;
bus->info.map_size |= (uint64)pciInfo->u.h0.base_register_sizes[1] << 32;
}
bus->info.map_size = pciInfo->u.h0.base_register_sizes[0];
if (bus->info.base_addr == 0) {
ERROR("PCI BAR not assigned\n");
free(bus);
return B_ERROR;
}
// enable power
pci->set_powerstate(device, PCI_pm_state_d0);