We're now using a secondary (high priority) ring buffer for hardware

overlay - this will improve the overlay performance when the engine is
under load (the acceleration engine will use the primary lower priority
ring buffer).



git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@17411 a95241bf-73f2-0310-859d-f6bbb57e9c96
This commit is contained in:
Axel Dörfler 2006-05-10 10:54:39 +00:00
parent 6bd70a559d
commit 96451fe133
4 changed files with 14 additions and 3 deletions

View File

@ -70,6 +70,7 @@ struct intel_shared_info {
uint32 frame_buffer_offset;
ring_buffer primary_ring_buffer;
ring_buffer secondary_ring_buffer;
int32 overlay_channel_used;
bool overlay_active;

View File

@ -175,6 +175,7 @@ intel_init_accelerant(int device)
return status;
setup_ring_buffer(gInfo->shared_info->primary_ring_buffer, "intel primary ring buffer");
setup_ring_buffer(gInfo->shared_info->secondary_ring_buffer, "intel secondary ring buffer");
status = create_mode_list();
if (status != B_OK) {

View File

@ -225,7 +225,7 @@ update_overlay(bool updateCoefficients)
if (!gInfo->shared_info->overlay_active)
return;
ring_buffer &ringBuffer = gInfo->shared_info->primary_ring_buffer;
ring_buffer &ringBuffer = gInfo->shared_info->secondary_ring_buffer;
write_to_ring(ringBuffer, COMMAND_FLUSH);
write_to_ring(ringBuffer, COMMAND_NOOP);
write_to_ring(ringBuffer, COMMAND_WAIT_FOR_EVENT | COMMAND_WAIT_FOR_OVERLAY_FLIP);
@ -252,7 +252,7 @@ show_overlay(void)
gInfo->shared_info->overlay_active = true;
registers->overlay_enabled = true;
ring_buffer &ringBuffer = gInfo->shared_info->primary_ring_buffer;
ring_buffer &ringBuffer = gInfo->shared_info->secondary_ring_buffer;
write_to_ring(ringBuffer, COMMAND_FLUSH);
write_to_ring(ringBuffer, COMMAND_NOOP);
write_to_ring(ringBuffer, COMMAND_OVERLAY_FLIP | COMMAND_OVERLAY_ON);
@ -273,7 +273,7 @@ hide_overlay(void)
gInfo->shared_info->overlay_active = false;
registers->overlay_enabled = false;
ring_buffer &ringBuffer = gInfo->shared_info->primary_ring_buffer;
ring_buffer &ringBuffer = gInfo->shared_info->secondary_ring_buffer;
// flush pending commands
write_to_ring(ringBuffer, COMMAND_FLUSH);

View File

@ -167,6 +167,7 @@ intel_extreme_init(intel_info &info)
// reserve ring buffer memory (currently, this memory is placed in
// the graphics memory), but this could bring us problems with
// write combining...
ring_buffer &primary = info.shared_info->primary_ring_buffer;
if (mem_alloc(info.memory_manager, B_PAGE_SIZE, &info,
&primary.handle, &primary.offset) == B_OK) {
@ -175,6 +176,14 @@ intel_extreme_init(intel_info &info)
primary.base = info.graphics_memory + primary.offset;
}
ring_buffer &secondary = info.shared_info->secondary_ring_buffer;
if (mem_alloc(info.memory_manager, B_PAGE_SIZE, &info,
&secondary.handle, &secondary.offset) == B_OK) {
secondary.register_base = INTEL_SECONDARY_RING_BUFFER_0;
secondary.size = B_PAGE_SIZE;
secondary.base = info.graphics_memory + secondary.offset;
}
// no errors, so keep mappings
graphicsMapper.Keep();
mmioMapper.Keep();