From 8cfbbff4df895f36e749e45a28699c493be522e8 Mon Sep 17 00:00:00 2001 From: Alexander von Gluck IV Date: Wed, 26 Feb 2014 13:22:18 -0600 Subject: [PATCH] ARM: Fix dmb opcode 2 on ARMv6 * Typo, also fix tabs * Sorry for the spam, this should be correct now --- headers/private/kernel/arch/arm/arch_atomic.h | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/headers/private/kernel/arch/arm/arch_atomic.h b/headers/private/kernel/arch/arm/arch_atomic.h index 1c5b5e3ff3..abe3943674 100644 --- a/headers/private/kernel/arch/arm/arch_atomic.h +++ b/headers/private/kernel/arch/arm/arch_atomic.h @@ -12,15 +12,15 @@ #if __ARM_ARCH__ <= 5 #define isb() __asm__ __volatile__("" : : : "memory") #define dsb() __asm__ __volatile__("mcr p15, 0, %0, c7, c10, 4" \ - : : "r" (0) : "memory") + : : "r" (0) : "memory") #define dmb() __asm__ __volatile__("" : : : "memory") #elif __ARM_ARCH__ == 6 #define isb() __asm__ __volatile__("mcr p15, 0, %0, c7, c5, 4" \ : : "r" (0) : "memory") #define dsb() __asm__ __volatile__("mcr p15, 0, %0, c7, c10, 4" \ - : : "r" (0) : "memory") -#define dmb() __asm__ __volatile__("mcr p15, 0, %0, c7, c10, 4" \ - : : "r" (0) : "memory") + : : "r" (0) : "memory") +#define dmb() __asm__ __volatile__("mcr p15, 0, %0, c7, c10, 5" \ + : : "r" (0) : "memory") #else /* ARMv7+ */ #define isb() __asm__ __volatile__("isb" : : : "memory") #define dsb() __asm__ __volatile__("dsb" : : : "memory")