radeon_hd: Fix APU / DCE 5+ encoder mode switch
* Don't touch transmitter. * Potential fix for #8331 and other HD 5xxx, 6xxx mode setting issues. * Missed in my backport drm commit: 3a47824d85eeca122895646f027dc63480994199 * Tested as non-impacting change on my APU
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@ -312,14 +312,13 @@ encoder_mode_set(uint8 id, uint32 pixelClock)
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case ENCODER_OBJECT_ID_INTERNAL_UNIPHY1:
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case ENCODER_OBJECT_ID_INTERNAL_UNIPHY1:
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case ENCODER_OBJECT_ID_INTERNAL_UNIPHY2:
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case ENCODER_OBJECT_ID_INTERNAL_UNIPHY2:
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case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_LVTMA:
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case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_LVTMA:
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if ((info.chipsetFlags & CHIP_APU) != 0) {
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if ((info.chipsetFlags & CHIP_APU) != 0
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// aka DCE 4.1
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|| info.dceMajor >= 5) {
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// Setup DIG encoder
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// Setup DIG encoder
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encoder_dig_setup(connectorIndex, pixelClock,
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encoder_dig_setup(connectorIndex, pixelClock,
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ATOM_ENCODER_CMD_SETUP);
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ATOM_ENCODER_CMD_SETUP);
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// Enable DIG transmitter
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encoder_dig_setup(connectorIndex, pixelClock,
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transmitter_dig_setup(connectorIndex, pixelClock, 0, 0,
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ATOM_ENCODER_CMD_SETUP_PANEL_MODE);
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ATOM_TRANSMITTER_ACTION_ENABLE);
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} else if (info.dceMajor >= 4) {
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} else if (info.dceMajor >= 4) {
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// Disable DIG transmitter
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// Disable DIG transmitter
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transmitter_dig_setup(connectorIndex, pixelClock, 0, 0,
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transmitter_dig_setup(connectorIndex, pixelClock, 0, 0,
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