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add hook to pass EDID back if requested by userspace (screen applet); fix calculation of H blankStart; correct typo on H_SYNC vs V_SYNC register; set +/- V_SYNC to 0x01 vs 0x02.. this prob still needs work; style corrections

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git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@41463 a95241bf-73f2-0310-859d-f6bbb57e9c96
This commit is contained in:
Alexander von Gluck IV 2011-05-12 16:58:49 +00:00
parent ff395022a6
commit 88bfef92b3
3 changed files with 29 additions and 7 deletions
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12
src/add-ons/accelerants/radeon_hd/accelerant_protos.h
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@ -1,9 +1,10 @@
/*
* Copyright 2006-2007, Haiku, Inc. All Rights Reserved.
* Copyright 2006-2011, Haiku, Inc. All Rights Reserved.
* Distributed under the terms of the MIT License.
*
* Authors:
* Axel Dörfler, axeld@pinc-software.de
* Alexander von Gluck, kallisti5@unixzen.com
*/
#ifndef ACCELERANT_PROTOS_H
#define ACCELERANT_PROTOS_H
@ -29,12 +30,15 @@ status_t radeon_get_mode_list(display_mode *dm);
status_t radeon_set_display_mode(display_mode *mode);
status_t radeon_get_display_mode(display_mode *currentMode);
status_t radeon_get_frame_buffer_config(frame_buffer_config *config);
status_t radeon_get_pixel_clock_limits(display_mode *mode, uint32 *low, uint32 *high);
status_t radeon_get_pixel_clock_limits(display_mode *mode,
uint32 *low, uint32 *high);
status_t radeon_get_edid_info(void* info, size_t size, uint32* edid_version);
// accelerant engine
status_t radeon_acquire_engine(uint32 capabilities, uint32 maxWait,
sync_token *syncToken, engine_token **_engineToken);
status_t radeon_release_engine(engine_token *engineToken, sync_token *syncToken);
sync_token *syncToken, engine_token **_engineToken);
status_t radeon_release_engine(engine_token *engineToken,
sync_token *syncToken);
#ifdef __cplusplus

2
src/add-ons/accelerants/radeon_hd/hooks.cpp
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@ -40,6 +40,8 @@ get_accelerant_hook(uint32 feature, void *data)
return (void*)radeon_set_display_mode;
case B_GET_DISPLAY_MODE:
return (void*)radeon_get_display_mode;
case B_GET_EDID_INFO:
return (void*)radeon_get_edid_info;
case B_GET_FRAME_BUFFER_CONFIG:
return (void*)radeon_get_frame_buffer_config;

22
src/add-ons/accelerants/radeon_hd/mode.cpp
View File

@ -76,6 +76,22 @@ radeon_get_mode_list(display_mode *modeList)
}
status_t
radeon_get_edid_info(void* info, size_t size, uint32* edid_version)
{
TRACE("%s\n", __func__);
if (!gInfo->shared_info->has_edid)
return B_ERROR;
if (size < sizeof(struct edid1_info))
return B_BUFFER_OVERFLOW;
memcpy(info, &gInfo->shared_info->edid_info, sizeof(struct edid1_info));
*edid_version = EDID_VERSION_1;
return B_OK;
}
static void
get_color_space_format(const display_mode &mode, uint32 &colorMode,
uint32 &bytesPerRow, uint32 &bitsPerPixel)
@ -133,7 +149,7 @@ CardModeSet(display_mode *mode)
write32(regOffset + D1CRTC_H_TOTAL, displayTiming.h_total - 1);
// determine blanking based on passed modeline
uint16 blankStart = displayTiming.h_display;
uint16 blankStart = displayTiming.h_display + 1;
uint16 blankEnd = displayTiming.h_total;
write32(regOffset + D1CRTC_H_BLANK_START_END,
@ -144,7 +160,7 @@ CardModeSet(display_mode *mode)
// set flag for neg. H sync
if (displayTiming.flags & ~B_POSITIVE_HSYNC)
write32(regOffset + D1CRTC_V_SYNC_A_CNTL, 0x01);
write32(regOffset + D1CRTC_H_SYNC_A_CNTL, 0x01);
// *** Vertical
write32(regOffset + D1CRTC_V_TOTAL, displayTiming.v_total - 1);
@ -169,7 +185,7 @@ CardModeSet(display_mode *mode)
// set flag for neg. V sync
if (displayTiming.flags & ~B_POSITIVE_VSYNC)
write32(regOffset + D1CRTC_V_SYNC_A_CNTL, 0x02);
write32(regOffset + D1CRTC_V_SYNC_A_CNTL, 0x01);
/* set D1CRTC_HORZ_COUNT_BY2_EN to 0;
should only be set to 1 on 30bpp DVI modes