intel_extreme: Enable FDI PLL's before FDI training
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@ -247,12 +247,23 @@ FDILink::Train(display_mode* target)
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TRACE("%s: FDI Link Lanes: %" B_PRIu32 "\n", __func__, lanes);
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// Over IVB supports AutoTraining of FDI
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if (gInfo->shared_info->device_type.Generation() >= 7)
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return _AutoTrain(lanes);
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// Enable FDI clocks
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Receiver().EnablePLL();
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Receiver().SwitchClock(true);
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Transmitter().EnablePLL();
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//return _ManualTrain(lanes);
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return B_ERROR;
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status_t result = B_ERROR;
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// Over IVB supports AutoTraining of FDI
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if (gInfo->shared_info->device_type.Generation() >= 7) {
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result = _AutoTrain(lanes);
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if (result != B_OK) {
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ERROR("%s: FDI auto-training fault. Attempting manual train.\n",
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__func__);
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return _ManualTrain(lanes);
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}
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}
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return _ManualTrain(lanes);
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}
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@ -261,14 +272,8 @@ FDILink::_ManualTrain(uint32 lanes)
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{
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CALLED();
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// This all needs review
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// Enable FDI clocks
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Receiver().EnablePLL();
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Receiver().SwitchClock(true);
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Transmitter().EnablePLL();
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ERROR("TODO: Generation 5 FDI Link Training\n");
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// This needs completed
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ERROR("TODO: Manual FDI Link Training\n");
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// Enable pipes
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Transmitter().Enable();
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@ -285,8 +290,11 @@ FDILink::_AutoTrain(uint32 lanes)
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uint32 rxControl = Receiver().Base() + PCH_FDI_RX_CONTROL;
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uint32 buffer = read32(txControl);
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// Clear port width selection and set number of lanes
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buffer &= ~(7 << 19);
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buffer |= (lanes - 1) << 19;
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if (gInfo->shared_info->device_type.InGroup(INTEL_GROUP_IVB))
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buffer &= ~FDI_LINK_TRAIN_NONE_IVB;
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else
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@ -335,7 +343,7 @@ FDILink::_AutoTrain(uint32 lanes)
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return B_ERROR;
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}
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// Enable ecc
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// Enable ecc on IVB
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if (gInfo->shared_info->device_type.InGroup(INTEL_GROUP_IVB)) {
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write32(rxControl, read32(rxControl)
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| FDI_FS_ERRC_ENABLE | FDI_FE_ERRC_ENABLE);
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