XHCI: Update all references from the specification 1.1 to 1.2.
Only comments changed, no functional.
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@ -828,7 +828,7 @@ XHCI::SubmitNormalRequest(Transfer *transfer)
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// The "TD Size" field of a transfer TRB indicates the number of
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// remaining maximum-size *packets* in this TD, *not* including the
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// packets in the current TRB, and capped at 31 if there are more
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// than 31 packets remaining in the TD. (XHCI 1.1 § 4.11.2.4 p210.)
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// than 31 packets remaining in the TD. (XHCI 1.2 § 4.11.2.4 p218.)
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int32 tdSize = remainingPackets > 31 ? 31 : remainingPackets;
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if (tdSize < 0)
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tdSize = 0;
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@ -982,7 +982,7 @@ XHCI::CancelQueuedTransfers(Pipe *pipe, bool force)
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endpoint->device->slot);
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// We don't need to do anything else to restart the ring, as it will resume
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// operation as normal upon the next doorbell. (XHCI 1.1 § 4.6.9 p132.)
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// operation as normal upon the next doorbell. (XHCI 1.2 § 4.6.9 p136.)
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} else {
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// We couldn't stop the endpoint. Most likely the device has been
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// removed and the endpoint was stopped by the hardware, or is
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@ -1991,7 +1991,7 @@ XHCI::ConfigureEndpoint(uint8 slot, uint8 number, uint8 type, bool directionIn,
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uint64 qwendpoint2 = 0;
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uint32 dwendpoint4 = 0;
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// Compute and assign the endpoint type. (XHCI 1.1 § 6.2.3 Table 6-9 p429.)
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// Compute and assign the endpoint type. (XHCI 1.2 § 6.2.3 Table 6-9 p452.)
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uint8 xhciType = 4;
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if ((type & USB_OBJECT_INTERRUPT_PIPE) != 0)
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xhciType = 3;
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@ -2002,7 +2002,7 @@ XHCI::ConfigureEndpoint(uint8 slot, uint8 number, uint8 type, bool directionIn,
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xhciType |= directionIn ? (1 << 2) : 0;
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dwendpoint1 |= ENDPOINT_1_EPTYPE(xhciType);
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// Compute and assign interval. (XHCI 1.1 § 6.2.3.6 p433.)
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// Compute and assign interval. (XHCI 1.2 § 6.2.3.6 p456.)
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uint16 calcInterval;
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if ((type & USB_OBJECT_BULK_PIPE) != 0
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|| (type & USB_OBJECT_CONTROL_PIPE) != 0) {
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@ -2040,12 +2040,12 @@ XHCI::ConfigureEndpoint(uint8 slot, uint8 number, uint8 type, bool directionIn,
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dwendpoint0 |= ENDPOINT_0_INTERVAL(calcInterval);
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// For non-isochronous endpoints, we want the controller to retry failed
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// transfers, if possible. (XHCI 1.1 § 4.10.2.3 p189.)
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// transfers, if possible. (XHCI 1.2 § 4.10.2.3 p197.)
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if ((type & USB_OBJECT_ISO_PIPE) == 0)
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dwendpoint1 |= ENDPOINT_1_CERR(3);
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// Assign maximum burst size. For USB3 devices this is passed in; for
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// all other devices we compute it. (XHCI 1.1 § 4.8.2 p154.)
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// all other devices we compute it. (XHCI 1.2 § 4.8.2 p161.)
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if (speed == USB_SPEED_HIGHSPEED && (type & (USB_OBJECT_INTERRUPT_PIPE
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| USB_OBJECT_ISO_PIPE)) != 0) {
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maxBurst = (maxPacketSize & 0x1800) >> 11;
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@ -2055,7 +2055,7 @@ XHCI::ConfigureEndpoint(uint8 slot, uint8 number, uint8 type, bool directionIn,
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dwendpoint1 |= ENDPOINT_1_MAXBURST(maxBurst);
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// Assign maximum packet size, set the ring address, and set the
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// "Dequeue Cycle State" bit. (XHCI 1.1 § 6.2.3 Table 6-10 p430.)
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// "Dequeue Cycle State" bit. (XHCI 1.2 § 6.2.3 Table 6-10 p453.)
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dwendpoint1 |= ENDPOINT_1_MAXPACKETSIZE(maxPacketSize);
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qwendpoint2 |= ENDPOINT_2_DCS_BIT | ringAddr;
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@ -2074,7 +2074,7 @@ XHCI::ConfigureEndpoint(uint8 slot, uint8 number, uint8 type, bool directionIn,
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dwendpoint4 |= ENDPOINT_4_AVGTRBLENGTH(maxPacketSize * 4);
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}
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// Assign maximum ESIT payload. (XHCI 1.1 § 4.14.2 p250.)
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// Assign maximum ESIT payload. (XHCI 1.2 § 4.14.2 p259.)
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if ((type & (USB_OBJECT_INTERRUPT_PIPE | USB_OBJECT_ISO_PIPE)) != 0) {
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// TODO: For SuperSpeedPlus endpoints, there is yet another descriptor
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// for isochronous endpoints that specifies the maximum ESIT payload.
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@ -2738,7 +2738,7 @@ XHCI::SetTRDequeue(uint64 dequeue, uint16 stream, uint8 endpoint, uint8 slot)
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xhci_trb trb;
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trb.address = dequeue | ENDPOINT_2_DCS_BIT;
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// The DCS bit is copied from the address field as in ConfigureEndpoint.
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// (XHCI 1.1 § 4.6.10 p142.)
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// (XHCI 1.2 § 4.6.10 p142.)
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trb.status = TRB_2_STREAM(stream);
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trb.flags = TRB_3_TYPE(TRB_TYPE_SET_TR_DEQUEUE)
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| TRB_3_SLOT(slot) | TRB_3_ENDPOINT(endpoint);
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