* refactor accelerant debugging
* clone VGA rom shared area in accelerant * enable access, and make a copy of the VGA bios * give malloc'ed VGA bios pointer to AtomBIOS parser * Still invalid BIOS magic * TODO : Move atomBIOS pointer and reorganize some stuff git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42550 a95241bf-73f2-0310-859d-f6bbb57e9c96
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@ -17,6 +17,8 @@
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#include "pll.h"
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#include "pll.h"
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#include "utility.h"
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#include "utility.h"
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#include <Debug.h>
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#include <errno.h>
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#include <errno.h>
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#include <stdlib.h>
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#include <stdlib.h>
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#include <stdio.h>
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#include <stdio.h>
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@ -27,9 +29,10 @@
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#include <AGP.h>
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#include <AGP.h>
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#undef TRACE
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#define TRACE_ACCELERANT
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#define TRACE_ACCELERANT
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#ifdef TRACE_ACCELERANT
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#ifdef TRACE_ACCELERANT
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extern "C" void _sPrintf(const char *format, ...);
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# define TRACE(x...) _sPrintf("radeon_hd: " x)
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# define TRACE(x...) _sPrintf("radeon_hd: " x)
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#else
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#else
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# define TRACE(x...) ;
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# define TRACE(x...) ;
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@ -138,8 +141,7 @@ init_common(int device, bool isClone)
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status_t status = sharedCloner.InitCheck();
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status_t status = sharedCloner.InitCheck();
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if (status < B_OK) {
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if (status < B_OK) {
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free(gInfo);
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free(gInfo);
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TRACE("%s, failed shared area%i, %i\n",
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TRACE("%s, failed to create shared area\n", __func__);
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__func__, data.shared_info_area, gInfo->shared_info_area);
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return status;
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return status;
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}
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}
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@ -150,11 +152,24 @@ init_common(int device, bool isClone)
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status = regsCloner.InitCheck();
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status = regsCloner.InitCheck();
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if (status < B_OK) {
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if (status < B_OK) {
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free(gInfo);
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free(gInfo);
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TRACE("%s, failed to create mmio area\n", __func__);
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return status;
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return status;
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}
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}
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AreaCloner romCloner;
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gInfo->rom_area = romCloner.Clone("radeon hd rom",
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(void **)&gInfo->rom, B_ANY_ADDRESS, B_READ_AREA | B_WRITE_AREA,
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gInfo->shared_info->rom_area);
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status = romCloner.InitCheck();
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if (status < B_OK) {
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//free(gInfo);
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TRACE("%s, failed to create rom area\n", __func__);
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//return status;
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}
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sharedCloner.Keep();
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sharedCloner.Keep();
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regsCloner.Keep();
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regsCloner.Keep();
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romCloner.Keep();
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// Define Radeon PLL default ranges
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// Define Radeon PLL default ranges
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gInfo->shared_info->pll_info.reference_frequency
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gInfo->shared_info->pll_info.reference_frequency
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@ -173,6 +188,7 @@ uninit_common(void)
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if (gInfo != NULL) {
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if (gInfo != NULL) {
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delete_area(gInfo->regs_area);
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delete_area(gInfo->regs_area);
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delete_area(gInfo->shared_info_area);
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delete_area(gInfo->shared_info_area);
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delete_area(gInfo->rom_area);
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gInfo->regs_area = gInfo->shared_info_area = -1;
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gInfo->regs_area = gInfo->shared_info_area = -1;
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@ -192,6 +208,52 @@ uninit_common(void)
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}
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}
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status_t
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radeon_init_bios()
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{
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radeon_shared_info &info = *gInfo->shared_info;
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uint32 bus_cntl = Read32(OUT, R600_BUS_CNTL);
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uint32 d1vga_control = Read32(OUT, D1VGA_CONTROL);
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uint32 d2vga_control = Read32(OUT, D2VGA_CONTROL);
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uint32 vga_render_control = Read32(OUT, VGA_RENDER_CONTROL);
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uint32 rom_cntl = Read32(OUT, R600_ROM_CNTL);
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// Enable rom access
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Write32(OUT, R600_BUS_CNTL, (bus_cntl & ~R600_BIOS_ROM_DIS));
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/* Disable VGA mode */
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Write32(OUT, D1VGA_CONTROL, (d1vga_control
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& ~(DVGA_CONTROL_MODE_ENABLE
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| DVGA_CONTROL_TIMING_SELECT)));
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Write32(OUT, D2VGA_CONTROL, (d2vga_control
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& ~(DVGA_CONTROL_MODE_ENABLE
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| DVGA_CONTROL_TIMING_SELECT)));
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Write32(OUT, VGA_RENDER_CONTROL, (vga_render_control
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& ~VGA_VSTATUS_CNTL_MASK));
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Write32(OUT, R600_ROM_CNTL, rom_cntl | R600_SCK_OVERWRITE);
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void* atomBIOS = (void*)malloc(info.rom_size);
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if (atomBIOS == NULL)
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return B_NO_MEMORY;
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snooze(2);
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memcpy(atomBIOS, gInfo->rom, info.rom_size);
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/* restore regs */
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Write32(OUT, R600_BUS_CNTL, bus_cntl);
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Write32(OUT, D1VGA_CONTROL, d1vga_control);
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Write32(OUT, D2VGA_CONTROL, d2vga_control);
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Write32(OUT, VGA_RENDER_CONTROL, vga_render_control);
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Write32(OUT, R600_ROM_CNTL, rom_cntl);
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// Init AtomBIOS
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bios_init(atomBIOS);
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return B_OK;
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}
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// #pragma mark - public accelerant functions
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// #pragma mark - public accelerant functions
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@ -210,8 +272,7 @@ radeon_init_accelerant(int device)
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init_lock(&info.accelerant_lock, "radeon hd accelerant");
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init_lock(&info.accelerant_lock, "radeon hd accelerant");
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init_lock(&info.engine_lock, "radeon hd engine");
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init_lock(&info.engine_lock, "radeon hd engine");
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// Init AtomBIOS
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radeon_init_bios();
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bios_init();
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status = detect_displays();
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status = detect_displays();
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//if (status != B_OK)
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//if (status != B_OK)
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@ -36,6 +36,9 @@ struct accelerant_info {
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display_mode *mode_list; // cloned list of standard display modes
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display_mode *mode_list; // cloned list of standard display modes
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area_id mode_list_area;
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area_id mode_list_area;
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uint8 *rom;
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area_id rom_area;
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edid1_info edid_info;
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edid1_info edid_info;
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bool has_edid;
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bool has_edid;
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@ -29,8 +29,15 @@ atom_context *gAtomBIOS;
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status_t
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status_t
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bios_init()
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bios_init(void* bios)
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{
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{
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if (gInfo->rom == NULL) {
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// just incase, this prevents a crash
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TRACE("%s: called even though VGA rom hasn't been mapped!\n",
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__func__);
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return B_ERROR;
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}
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struct card_info *atom_card_info
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struct card_info *atom_card_info
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= (card_info*)malloc(sizeof(card_info));
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= (card_info*)malloc(sizeof(card_info));
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@ -55,7 +62,7 @@ bios_init()
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atom_card_info->pll_write = _write32;
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atom_card_info->pll_write = _write32;
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// Point AtomBIOS parser to card bios and malloc gAtomBIOS
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// Point AtomBIOS parser to card bios and malloc gAtomBIOS
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gAtomBIOS = atom_parse(atom_card_info, gInfo->shared_info->rom);
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gAtomBIOS = atom_parse(atom_card_info, bios);
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if (gAtomBIOS == NULL) {
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if (gAtomBIOS == NULL) {
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TRACE("%s: couldn't parse system AtomBIOS\n", __func__);
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TRACE("%s: couldn't parse system AtomBIOS\n", __func__);
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@ -14,7 +14,7 @@
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#include "atom.h"
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#include "atom.h"
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status_t bios_init();
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status_t bios_init(void* bios);
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#endif /* RADEON_HD_BIOS_H */
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#endif /* RADEON_HD_BIOS_H */
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