diff --git a/headers/private/graphics/via/macros.h b/headers/private/graphics/via/macros.h
index 09fb2de7a1..781e75a160 100644
--- a/headers/private/graphics/via/macros.h
+++ b/headers/private/graphics/via/macros.h
@@ -669,6 +669,63 @@
 #define ENGRPHX_MODE		0x05
 #define ENGRPHX_MISC		0x06
 #define ENGRPHX_BITMASK		0x08
+
+/* VIA BES (Back End Scaler) registers) */
+#define ENBES_INTFLAG		0x00000200
+#define ENBES_RAMTAB		0x00000204
+#define ENBES_AWIN_HVSTART	0x00000208
+#define ENBES_AWIN_SIZE		0x0000020c
+#define ENBES_AWIN_CTL		0x00000210
+#define ENBES_CRT_STARTADR	0x00000214
+#define ENBES_CRT_STARTADR2	0x00000218
+#define ENBES_AFB_STRIDE	0x0000021c
+#define ENBES_COLKEY		0x00000240
+#define ENBES_AFB_ADDR		0x00000224
+#define ENBES_CHROMA__LOW	0x00000228
+#define ENBES_CHROMA_UP		0x0000022c
+#define ENBES_VID1_CTL		0x00000230
+#define ENBES_VID1_FETCH	0x00000234
+#define ENBES_VID1Y_ADDR1	0x00000238
+#define ENBES_VID1_STRIDE	0x0000023c
+#define ENBES_VID1_HVSTART	0x00000240
+#define ENBES_VID1_SIZE		0x00000244
+#define ENBES_VID1Y_ADDR2	0x00000248
+#define ENBES_VID1_ZOOM		0x0000024c
+#define ENBES_VID1_MICTL	0x00000250
+#define ENBES_VID1Y_ADDR0	0x00000254
+#define ENBES_VID1_FIFO		0x00000258
+#define ENBES_VID1Y_ADDR3	0x0000025c
+#define ENBES_HI_CTRL		0x00000260
+#define ENBES_SND_COLKEY	0x00000264
+#define ENBES_V3A_PREFIFO	0x00000268
+#define ENBES_V1_SOURCE_WH	0x0000026c
+#define ENBES_HI_TRANSP_COL	0x00000270
+#define ENBES_V3A_FIFO		0x00000278
+#define ENBES_V3_SRC_WIDTH	0x0000027c
+#define ENBES_VID1_CSC1		0x00000284
+#define ENBES_VID1_CSC2		0x00000288
+#define ENBES_VID1U_ADDR0	0x0000028c
+#define ENBES_VID1_OPQ_CTL	0x00000290
+#define ENBES_VID3_OPQ_CTL	0x00000294
+#define ENBES_COMPOSE		0x00000298
+#define ENBES_VID3_CTL		0x000002a0
+#define ENBES_VID3_ADDR0	0x000002a4
+#define ENBES_VID3_ADDR1	0x000002a8
+#define ENBES_VID3_STRIBE	0x000002ac
+#define ENBES_VID3_HVSTART	0x000002b0
+#define ENBES_VID3_SIZE		0x000002b4
+#define ENBES_V3A_FETCH		0x000002b8
+#define ENBES_VID3_ZOOM		0x000002bc
+#define ENBES_VID3_MICTL	0x000002c0
+#define ENBES_VID3_CSC1		0x000002c4
+#define ENBES_VID3_CSC2		0x000002c8
+#define ENBES_VID1U_ADDR1	0x000002e4
+#define ENBES_VID1U_ADDR2	0x000002e8
+#define ENBES_VID1U_ADDR3	0x000002ec
+#define ENBES_VID1V_ADDR0	0x000002f0
+#define ENBES_VID1V_ADDR1	0x000002f4
+#define ENBES_VID1V_ADDR2	0x000002f8
+#define ENBES_VID1V_ADDR3	0x000002fc
 //end via new.
 
 /* Nvidia BES (Back End Scaler) registers (< NV10, including NV03, so RIVA128(ZX)) */