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panel update for 'right-shifted' picture on some cards

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git-svn-id: file:///srv/svn/repos/haiku/trunk/current@8175 a95241bf-73f2-0310-859d-f6bbb57e9c96
This commit is contained in:
Rudolf Cornelissen 2004-06-26 11:18:10 +00:00
parent e4901b9f4b
commit 7ae8e6dcc6
4 changed files with 20 additions and 6 deletions
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6
src/add-ons/accelerants/nvidia/engine/nv_agp.c
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@ -275,6 +275,10 @@ static void nv_agp_list_caps(agp_info ai)
} }
if (ai.config.agp_cmd & AGP_FW) LOG(4,("AGP: fastwrite transfers are enabled\n")); if (ai.config.agp_cmd & AGP_FW) LOG(4,("AGP: fastwrite transfers are enabled\n"));
if (ai.config.agp_cmd & AGP_SBA) LOG(4,("AGP: sideband adressing is enabled\n")); if (ai.config.agp_cmd & AGP_SBA) LOG(4,("AGP: sideband adressing is enabled\n"));
LOG(4,("AGP: max. AGP queued request depth is set to %d.\n", LOG(4,("AGP: max. AGP queued request depth is set to %d\n",
(((ai.config.agp_cmd & AGP_RQ) >> AGP_RQ_shift) + 1))); (((ai.config.agp_cmd & AGP_RQ) >> AGP_RQ_shift) + 1)));
if (ai.config.agp_cmd & AGP_enable)
LOG(4,("AGP: this AGP interface is currently enabled.\n"));
else
LOG(4,("AGP: this AGP interface is currently disabled.\n"));
} }

9
src/add-ons/accelerants/nvidia/engine/nv_crtc.c
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@ -130,9 +130,14 @@ status_t nv_crtc_set_timing(display_mode target)
(((uint16)((si->ps.p1_timing.h_total / ((float)si->ps.p1_timing.h_display)) * (((uint16)((si->ps.p1_timing.h_total / ((float)si->ps.p1_timing.h_display)) *
target.timing.h_display)) & 0xfff8) - 8; target.timing.h_display)) & 0xfff8) - 8;
//fixme: can be removed if community confirms no problems with modified setup!
//(confirmed this 'problem' on NV34 and NV11 now.)
/* NV11 timing has tighter constraints than later cards */ /* NV11 timing has tighter constraints than later cards */
if ((si->ps.card_type == NV11) && // if ((si->ps.card_type == NV11) &&
(target.timing.h_display == si->ps.p1_timing.h_display)) // (target.timing.h_display == si->ps.p1_timing.h_display))
/* in native mode the CRTC needs some extra time to keep synced correctly */
if (target.timing.h_display == si->ps.p1_timing.h_display)
{ {
target.timing.h_total -= 56; target.timing.h_total -= 56;
} }

9
src/add-ons/accelerants/nvidia/engine/nv_crtc2.c
View File

@ -116,9 +116,14 @@ status_t nv_crtc2_set_timing(display_mode target)
(((uint16)((si->ps.p2_timing.h_total / ((float)si->ps.p2_timing.h_display)) * (((uint16)((si->ps.p2_timing.h_total / ((float)si->ps.p2_timing.h_display)) *
target.timing.h_display)) & 0xfff8) - 8; target.timing.h_display)) & 0xfff8) - 8;
//fixme: can be removed if community confirms no problems with modified setup!
//(confirmed this 'problem' on NV34 and NV11 now.)
/* NV11 timing has tighter constraints than later cards */ /* NV11 timing has tighter constraints than later cards */
if ((si->ps.card_type == NV11) && // if ((si->ps.card_type == NV11) &&
(target.timing.h_display == si->ps.p2_timing.h_display)) // (target.timing.h_display == si->ps.p2_timing.h_display))
/* in native mode the CRTC needs some extra time to keep synced correctly */
if (target.timing.h_display == si->ps.p2_timing.h_display)
{ {
target.timing.h_total -= 56; target.timing.h_total -= 56;
} }

2
src/add-ons/accelerants/nvidia/engine/nv_general.c
View File

@ -80,7 +80,7 @@ status_t nv_general_powerup()
{ {
status_t status; status_t status;
LOG(1,("POWERUP: nVidia (open)BeOS Accelerant 0.14 running.\n")); LOG(1,("POWERUP: nVidia (open)BeOS Accelerant 0.15 running.\n"));
/* preset no laptop */ /* preset no laptop */
si->ps.laptop = false; si->ps.laptop = false;