intel_extreme: fix overflow in SKL PLL calculation

* RGB 4K@60Hz clock is 594MHz, that multiplied by 5 overflows int value.

Change-Id: Idda04119d582fa4e30c7729296ad5959b29dba77
Reviewed-on: https://review.haiku-os.org/c/haiku/+/4738
Tested-by: Commit checker robot <no-reply+buildbot@haiku-os.org>
Reviewed-by: Rudolf Cornelissen <rudhaiku@gmail.com>

src/add-ons/accelerants/intel_extreme/pll.cpp

@@ -991,7 +991,7 @@ skl_ddi_calculate_wrpll(int clock /* in Hz */,
 			int ref_clock,
 			struct skl_wrpll_params *wrpll_params)
 {
-	uint64 afe_clock = clock * 5; /* AFE Clock is 5x Pixel clock */
+	uint64 afe_clock = (uint64) clock * 5; /* AFE Clock is 5x Pixel clock */
 	uint64 dco_central_freq[3] = { 8400000000ULL,
 				    9000000000ULL,
 				    9600000000ULL };