re-enabled EDID native modeline grabbing with I2C bus 2 enabled. Now EDID is correctly fetched on all my cards, including G72 id0x1d1 and NV43 id0x141. info is stored in shared_info, not actually used yet though. (wip)
git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@30951 a95241bf-73f2-0310-859d-f6bbb57e9c96
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@ -346,13 +346,11 @@ status_t i2c_init(void)
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}
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}
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//fixme: testing again..
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i2c_TestEDID();
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// i2c_DetectScreens();
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// LOG(4,("I2C: dumping EDID specs for connector 1:\n"));
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// i2c_DumpSpecsEDID(&si->ps.con1_screen);
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// LOG(4,("I2C: dumping EDID specs for connector 2:\n"));
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// i2c_DumpSpecsEDID(&si->ps.con2_screen);
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i2c_DetectScreens();
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LOG(4,("I2C: dumping EDID specs for connector 1:\n"));
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i2c_DumpSpecsEDID(&si->ps.con1_screen);
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LOG(4,("I2C: dumping EDID specs for connector 2:\n"));
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i2c_DumpSpecsEDID(&si->ps.con2_screen);
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return result;
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}
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@ -682,9 +680,10 @@ i2c_DumpSpecsEDID(edid_specs* specs)
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* architecture cards. On later cards it's vice versa. These connections do not depend
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* on the analog VGA switch setting (see nv_general_output_select()). It also does
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* not depend on the way screens are connected to the cards (DVI/VGA, 1 or 2 screens).
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* - on some NV40 architecture cards i2c bus2 connects to con2 instead of i2c bus0. This
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* is confirmed on GeForce FX 6600 (NV43, id 0x0141) and GeForce 7300 (G72, id 0x01d1).
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* - con1 has CRTC1 and DAC1, and con2 has CRTC2 and DAC2 if nv_general_output_select()
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* is set to 'straight' and there are only VGA type screens connected. */
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//fixme: take third I2C bus into account..
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void i2c_DetectScreens(void)
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{
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edid1_info edid;
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@ -693,34 +692,54 @@ void i2c_DetectScreens(void)
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si->ps.con2_screen.have_edid = false;
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/* check existance of bus 0 */
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if (!si->ps.i2c_bus0) return;
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/* check I2C bus 0 for an EDID capable screen */
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if (i2c_ReadEDID(0, &edid) == B_OK) {
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/* fetch optimum (native) modeline */
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switch (si->ps.card_arch) {
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case NV40A:
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i2c_ExtractSpecsEDID(&edid, &si->ps.con2_screen);
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break;
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default:
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i2c_ExtractSpecsEDID(&edid, &si->ps.con1_screen);
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break;
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if (si->ps.i2c_bus0) {
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/* check I2C bus 0 for an EDID capable screen */
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if (i2c_ReadEDID(0, &edid) == B_OK) {
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/* fetch optimum (native) modeline */
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switch (si->ps.card_arch) {
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case NV40A:
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i2c_ExtractSpecsEDID(&edid, &si->ps.con2_screen);
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break;
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default:
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i2c_ExtractSpecsEDID(&edid, &si->ps.con1_screen);
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break;
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}
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}
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}
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/* check existance of bus 1 */
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if (!si->ps.i2c_bus1) return;
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if (si->ps.i2c_bus1) {
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/* check I2C bus 1 for an EDID screen */
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if (i2c_ReadEDID(1, &edid) == B_OK) {
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/* fetch optimum (native) modeline */
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switch (si->ps.card_arch) {
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case NV40A:
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i2c_ExtractSpecsEDID(&edid, &si->ps.con1_screen);
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break;
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default:
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i2c_ExtractSpecsEDID(&edid, &si->ps.con2_screen);
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break;
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}
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}
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}
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/* check I2C bus 1 for an EDID screen */
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if (i2c_ReadEDID(1, &edid) == B_OK) {
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/* fetch optimum (native) modeline */
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switch (si->ps.card_arch) {
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case NV40A:
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i2c_ExtractSpecsEDID(&edid, &si->ps.con1_screen);
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break;
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default:
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i2c_ExtractSpecsEDID(&edid, &si->ps.con2_screen);
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break;
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/* check existance of bus 2 */
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if (si->ps.i2c_bus2) {
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/* check I2C bus 2 for an EDID screen */
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if (i2c_ReadEDID(2, &edid) == B_OK) {
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/* fetch optimum (native) modeline */
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switch (si->ps.card_arch) {
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case NV40A:
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if (!si->ps.con2_screen.have_edid) {
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i2c_ExtractSpecsEDID(&edid, &si->ps.con2_screen);
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} else {
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LOG(4,("I2C: DetectScreens: WARNING, unexpected behaviour detected!\n"));
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}
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break;
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default:
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LOG(4,("I2C: DetectScreens: WARNING, unexpected behaviour detected!\n"));
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break;
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}
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}
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}
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}
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