* threshold higher bit means a full frame. Also use the threshold for micro frames instead of frames.
* introduces fNextStartingFrame to keep track of the next frame to use on next submit. * set the IOC bit for the last ITD * computes multiply field of the ITD based on the packed size (1, 2 or 3). * use locking around linking of ITD * free descriptors on errors * on finishing, whenever a non success status is found, set actual length to zero * on finishing, when copying data to the Transfer object, copy starting on packet boundaries (skipping unused bytes). git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42679 a95241bf-73f2-0310-859d-f6bbb57e9c96
This commit is contained in:
Jérôme Duval
parent
886b38122b
commit
77660b03e8
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@ -123,6 +123,7 @@ EHCI::EHCI(pci_info *info, Stack *stack)
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fCleanupSem(-1),
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fCleanupThread(-1),
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fStopThreads(false),
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fNextStartingFrame(-1),
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fFrameBandwidth(NULL),
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fFirstIsochronousTransfer(NULL),
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fLastIsochronousTransfer(NULL),
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@ -221,6 +222,11 @@ EHCI::EHCI(pci_info *info, Stack *stack)
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TRACE("structural parameters: 0x%08lx\n", ReadCapReg32(EHCI_HCSPARAMS));
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TRACE("capability parameters: 0x%08lx\n", ReadCapReg32(EHCI_HCCPARAMS));
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if (EHCI_HCCPARAMS_FRAME_CACHE(ReadCapReg32(EHCI_HCCPARAMS)))
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fThreshold = 2 + 8;
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else
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fThreshold = 2 + EHCI_HCCPARAMS_IPT(ReadCapReg32(EHCI_HCCPARAMS));
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// read port count from capability register
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fPortCount = ReadCapReg32(EHCI_HCSPARAMS) & 0x0f;
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@ -730,24 +736,26 @@ EHCI::SubmitIsochronous(Transfer *transfer)
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if (isochronousData->flags & USB_ISO_ASAP ||
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isochronousData->starting_frame_number == NULL) {
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uint32 threshold = (ReadCapReg32(EHCI_HCCPARAMS)
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>> EHCI_HCCPARAMS_IPT_SHIFT) & EHCI_HCCPARAMS_IPT_MASK;
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TRACE("threshold: %ld\n", threshold);
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if (fFirstIsochronousTransfer != NULL && fNextStartingFrame != -1)
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currentFrame = fNextStartingFrame;
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else {
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uint32 threshold = fThreshold;
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TRACE("threshold: %ld\n", threshold);
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// find the first available frame with enough bandwidth.
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// This should always be the case, as defining the starting frame
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// number in the driver makes no sense for many reason, one of which
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// is that frame numbers value are host controller specific, and the
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// driver does not know which host controller is running.
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currentFrame = (ReadOpReg(EHCI_FRINDEX) / 8)
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& (EHCI_FRAMELIST_ENTRIES_COUNT - 1);
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// find the first available frame with enough bandwidth.
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// This should always be the case, as defining the starting frame
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// number in the driver makes no sense for many reason, one of which
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// is that frame numbers value are host controller specific, and the
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// driver does not know which host controller is running.
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currentFrame = ((ReadOpReg(EHCI_FRINDEX) + threshold) / 8)
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& (EHCI_FRAMELIST_ENTRIES_COUNT - 1);
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}
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// Make sure that:
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// 1. We are at least 5ms ahead the controller
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// 2. We stay in the range 0-127
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// 3. There is enough bandwidth in the first entry
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currentFrame = (currentFrame + threshold)
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& (EHCI_VFRAMELIST_ENTRIES_COUNT - 1);
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currentFrame &= EHCI_VFRAMELIST_ENTRIES_COUNT - 1;
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} else {
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// Find out if the frame number specified has enough bandwidth,
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// otherwise find the first next available frame with enough bandwidth
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@ -762,6 +770,7 @@ EHCI::SubmitIsochronous(Transfer *transfer)
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addr_t bufferPhy;
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if (fStack->AllocateChunk(&bufferLog, (void**)&bufferPhy, dataLength) < B_OK) {
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TRACE_ERROR("unable to allocate itd buffer\n");
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delete isoRequest;
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return B_NO_MEMORY;
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}
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@ -791,6 +800,8 @@ EHCI::SubmitIsochronous(Transfer *transfer)
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itd->buffer_phy[pg + 1] = currentPhy & 0xfffff000;
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pg++;
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}
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if (dataLength <= 0)
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itd->token[i] |= EHCI_ITD_IOC;
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}
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currentPhy += (offset & 0xfff) - (currentPhy & 0xfff);
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@ -799,12 +810,17 @@ EHCI::SubmitIsochronous(Transfer *transfer)
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| (pipe->DeviceAddress() << EHCI_ITD_ADDRESS_SHIFT);
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itd->buffer_phy[1] |= (pipe->MaxPacketSize() & EHCI_ITD_MAXPACKETSIZE_MASK)
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| (directionIn << EHCI_ITD_DIR_SHIFT);
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itd->buffer_phy[2] |= (1 << EHCI_ITD_MUL_SHIFT);
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itd->buffer_phy[2] |=
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((((pipe->MaxPacketSize() >> EHCI_ITD_MAXPACKETSIZE_LENGTH) + 1)
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& EHCI_ITD_MUL_MASK) << EHCI_ITD_MUL_SHIFT);
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TRACE("isochronous filled itd buffer_phy[0,1,2] 0x%lx, 0x%lx 0x%lx\n",
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itd->buffer_phy[0], itd->buffer_phy[1], itd->buffer_phy[2]);
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if (!LockIsochronous())
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continue;
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LinkITDescriptors(itd, &fItdEntries[currentFrame]);
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UnlockIsochronous();
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fFrameBandwidth[currentFrame] -= bandwidth;
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currentFrame = (currentFrame + 1) & (EHCI_VFRAMELIST_ENTRIES_COUNT - 1);
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frameCount++;
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@ -818,11 +834,15 @@ EHCI::SubmitIsochronous(Transfer *transfer)
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transfer->DataLength());
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if (result < B_OK) {
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TRACE_ERROR("failed to add pending isochronous transfer\n");
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for (uint32 i = 0; i < itdIndex; i++)
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FreeDescriptor(isoRequest[i]);
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delete isoRequest;
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return result;
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}
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TRACE("appended isochronous transfer by starting at frame number %d\n",
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currentFrame);
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fNextStartingFrame = currentFrame + 1;
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// Wake up the isochronous finisher thread
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release_sem_etc(fFinishIsochronousTransfersSem, 1 /*frameCount*/, B_DO_NOT_RESCHEDULE);
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@ -2146,7 +2166,8 @@ EHCI::FreeDescriptor(ehci_qtd *descriptor)
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(void *)descriptor->buffer_phy[0], descriptor->buffer_size);
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}
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fStack->FreeChunk(descriptor, (void *)descriptor->this_phy, sizeof(ehci_qtd));
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fStack->FreeChunk(descriptor, (void *)descriptor->this_phy,
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sizeof(ehci_qtd));
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}
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@ -2208,7 +2229,8 @@ EHCI::FreeDescriptor(ehci_itd *descriptor)
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if (!descriptor)
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return;
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fStack->FreeChunk(descriptor, (void *)descriptor->this_phy, sizeof(ehci_itd));
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fStack->FreeChunk(descriptor, (void *)descriptor->this_phy,
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sizeof(ehci_itd));
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}
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@ -2218,7 +2240,8 @@ EHCI::FreeDescriptor(ehci_sitd *descriptor)
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if (!descriptor)
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return;
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fStack->FreeChunk(descriptor, (void *)descriptor->this_phy, sizeof(ehci_sitd));
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fStack->FreeChunk(descriptor, (void *)descriptor->this_phy,
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sizeof(ehci_sitd));
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}
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@ -2372,7 +2395,8 @@ EHCI::ReadDescriptorChain(ehci_qtd *topDescriptor, iovec *vector,
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if (vectorOffset >= vector[vectorIndex].iov_len) {
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if (++vectorIndex >= vectorCount) {
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TRACE("read descriptor chain (%ld bytes, no more vectors)\n", actualLength);
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TRACE("read descriptor chain (%ld bytes, no more vectors)"
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"\n", actualLength);
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*nextDataToggle = dataToggle > 0 ? true : false;
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return actualLength;
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}
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@ -2437,7 +2461,6 @@ EHCI::ReadIsochronousDescriptorChain(isochronous_transfer_data *transfer)
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{
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iovec *vector = transfer->transfer->Vector();
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size_t vectorCount = transfer->transfer->VectorCount();
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size_t vectorOffset = 0;
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size_t vectorIndex = 0;
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usb_isochronous_data *isochronousData
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@ -2456,6 +2479,10 @@ EHCI::ReadIsochronousDescriptorChain(isochronous_transfer_data *transfer)
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size_t bufferSize = (itd->token[j] >> EHCI_ITD_TLENGTH_SHIFT)
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& EHCI_ITD_TLENGTH_MASK;
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if (((itd->token[j] >> EHCI_ITD_STATUS_SHIFT)
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& EHCI_ITD_STATUS_MASK) != 0) {
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bufferSize = 0;
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}
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isochronousData->packet_descriptors[packet].actual_length =
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bufferSize;
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@ -2467,6 +2494,7 @@ EHCI::ReadIsochronousDescriptorChain(isochronous_transfer_data *transfer)
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totalLength += bufferSize;
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size_t offset = bufferOffset;
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size_t skipSize = packetSize - bufferSize;
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while (bufferSize > 0) {
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size_t length = min_c(bufferSize,
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vector[vectorIndex].iov_len - vectorOffset);
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@ -2487,6 +2515,23 @@ EHCI::ReadIsochronousDescriptorChain(isochronous_transfer_data *transfer)
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}
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}
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// skip to next packet offset
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while (skipSize > 0) {
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size_t length = min_c(skipSize,
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vector[vectorIndex].iov_len - vectorOffset);
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vectorOffset += length;
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skipSize -= length;
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if (vectorOffset >= vector[vectorIndex].iov_len) {
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if (++vectorIndex >= vectorCount) {
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TRACE("read isodescriptor chain (%ld bytes, no more "
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"vectors)\n", totalLength);
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return totalLength;
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}
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vectorOffset = 0;
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}
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}
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bufferOffset += packetSize;
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if (bufferOffset >= transfer->buffer_size)
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return totalLength;
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@ -195,6 +195,7 @@ static pci_module_info * sPCIModule;
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pci_info * fPCIInfo;
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Stack * fStack;
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uint32 fEnabledInterrupts;
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uint32 fThreshold;
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// Periodic transfer framelist and interrupt entries
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area_id fPeriodicFrameListArea;
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@ -218,6 +219,7 @@ static pci_module_info * sPCIModule;
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sem_id fCleanupSem;
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thread_id fCleanupThread;
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bool fStopThreads;
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int32 fNextStartingFrame;
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// fFrameBandwidth[n] holds the available bandwidth
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// of the nth frame in microseconds
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@ -112,8 +112,8 @@
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#define EHCI_HCCPARAMS_PPCEC (1 << 18) // Per-Port Change Event
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#define EHCI_HCCPARAMS_LPM (1 << 17) // Link Power Management
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#define EHCI_HCCPARAMS_HP (1 << 16) // Hardware Prefetch
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#define EHCI_HCCPARAMS_IPT_SHIFT 4 // Isochronous Periodic Threshold
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#define EHCI_HCCPARAMS_IPT_MASK 0xf
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#define EHCI_HCCPARAMS_FRAME_CACHE(x) ((x >> 7) & 0x1) // Isochronous Periodic Threshold
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#define EHCI_HCCPARAMS_IPT(x) ((x >> 4) & 0x7) // Isochronous Periodic Threshold
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// Data Structures (EHCI Spec 3)
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@ -161,10 +161,12 @@ typedef struct ehci_itd {
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#define EHCI_ITD_ENDPOINT_MASK 0xf
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#define EHCI_ITD_DIR_SHIFT 11
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#define EHCI_ITD_MUL_SHIFT 0
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#define EHCI_ITD_MUL_MASK 0x3
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#define EHCI_ITD_BUFFERPOINTER_SHIFT 12
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#define EHCI_ITD_BUFFERPOINTER_MASK 0xfffff
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#define EHCI_ITD_MAXPACKETSIZE_SHIFT 0
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#define EHCI_ITD_MAXPACKETSIZE_MASK 0x7ff
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#define EHCI_ITD_MAXPACKETSIZE_LENGTH 11
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// Split Transaction Isochronous Transfer Descriptors (siTD, EHCI Spec 3.3)
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