From 756fb8b7964aedbadad260cec62997d753ddd401 Mon Sep 17 00:00:00 2001 From: Alexander von Gluck IV Date: Mon, 17 Oct 2011 22:49:44 +0000 Subject: [PATCH] * fix pll limitations probing * radeon HD mode setting on analog monitors is now working! git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@42877 a95241bf-73f2-0310-859d-f6bbb57e9c96 --- src/add-ons/accelerants/radeon_hd/pll.cpp | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/src/add-ons/accelerants/radeon_hd/pll.cpp b/src/add-ons/accelerants/radeon_hd/pll.cpp index 28b2a05387..7799bda2fc 100644 --- a/src/add-ons/accelerants/radeon_hd/pll.cpp +++ b/src/add-ons/accelerants/radeon_hd/pll.cpp @@ -69,24 +69,24 @@ pll_limit_probe(pll_info *pll) } else { pll->pllOutMin = B_LENDIAN_TO_HOST_INT32( - firmwareInfo->info_12.ulMinPixelClockPLL_Output); + firmwareInfo->info_12.ulMinPixelClockPLL_Output) * 10; } pll->pllOutMax = B_LENDIAN_TO_HOST_INT32( - firmwareInfo->info.ulMaxPixelClockPLL_Output); + firmwareInfo->info.ulMaxPixelClockPLL_Output) * 10; if (tableMinor >= 4) { pll->lcdPllOutMin = B_LENDIAN_TO_HOST_INT16( - firmwareInfo->info_14.usLcdMinPixelClockPLL_Output) * 100; + firmwareInfo->info_14.usLcdMinPixelClockPLL_Output) * 1000; if (pll->lcdPllOutMin == 0) pll->lcdPllOutMin = pll->pllOutMin; pll->lcdPllOutMax = B_LENDIAN_TO_HOST_INT16( - firmwareInfo->info_14.usLcdMaxPixelClockPLL_Output) * 100; + firmwareInfo->info_14.usLcdMaxPixelClockPLL_Output) * 1000; if (pll->lcdPllOutMax == 0) pll->lcdPllOutMax = pll->pllOutMax;