x86: Debugger can now use dr3

This commit is contained in:
Pawel Dziepak 2013-12-17 04:31:29 +01:00
parent a5b070f1fa
commit 735f67481f
4 changed files with 4 additions and 12 deletions

View File

@ -62,7 +62,7 @@ void arch_syscall_64_bit_return_value(void);
static inline void
arch_thread_set_current_thread(Thread* t)
{
asm volatile("mov %0, %%gs:0" : : "r" (t));
asm volatile("mov %0, %%gs:0" : : "r" (t) : "memory");
}

View File

@ -9,12 +9,7 @@
#define ARCH_INIT_USER_DEBUG x86_init_user_debug
// number of breakpoints the CPU supports
// On 32-bit, DR3 is used to hold the Thread*.
#ifdef __x86_64__
# define X86_BREAKPOINT_COUNT 4
#else
# define X86_BREAKPOINT_COUNT 3
#endif
#define X86_BREAKPOINT_COUNT 4
// debug status register DR6
enum {

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@ -1202,13 +1202,13 @@ arch_debug_get_interrupt_pc(bool* _isSyscall)
void
arch_debug_unset_current_thread(void)
{
#ifdef __x86_64__
// Can't just write 0 to the GS base, that will cause the read from %gs:0
// to fault. Instead point it at a NULL pointer, %gs:0 will get this value.
static Thread* unsetThread = NULL;
#ifdef __x86_64__
x86_write_msr(IA32_MSR_GS_BASE, (addr_t)&unsetThread);
#else
x86_write_dr3(NULL);
asm volatile("mov %0, %%gs:0" : : "r" (unsetThread) : "memory");
#endif
}

View File

@ -201,10 +201,7 @@ install_breakpoints(const arch_team_debug_info& teamInfo)
asm("mov %0, %%dr0" : : "r"(teamInfo.breakpoints[0].address));
asm("mov %0, %%dr1" : : "r"(teamInfo.breakpoints[1].address));
asm("mov %0, %%dr2" : : "r"(teamInfo.breakpoints[2].address));
#ifdef __x86_64__
asm("mov %0, %%dr3" : : "r"(teamInfo.breakpoints[3].address));
// DR3 is used to hold the current Thread* on 32.
#endif
// enable breakpoints
asm("mov %0, %%dr7" : : "r"(teamInfo.dr7));