x86[_64]: Fix style issues
This commit is contained in:
Pawel Dziepak
parent
149c82a8ec
commit
7039b950fb
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@ -14,7 +14,7 @@
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// http://graphics.stanford.edu/~seander/bithacks.html
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static inline uint32
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nextPowerOf2(uint32 v)
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next_power_of_2(uint32 v)
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{
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v--;
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v |= v >> 1;
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@ -30,7 +30,7 @@ nextPowerOf2(uint32 v)
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// http://graphics.stanford.edu/~seander/bithacks.html
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static inline uint32
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countSetBits(uint32 v)
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count_set_bits(uint32 v)
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{
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v = v - ((v >> 1) & 0x55555555);
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v = (v & 0x33333333) + ((v >> 2) & 0x33333333);
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@ -518,7 +518,7 @@ dump_feature_string(int currentCPU, cpu_ent* cpu)
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static void
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computeCPUHierarchyMasks(int maxLogicalID, int maxCoreID)
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compute_cpu_hierarchy_masks(int maxLogicalID, int maxCoreID)
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{
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ASSERT(maxLogicalID >= maxCoreID);
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const int kMaxSMTID = maxLogicalID / maxCoreID;
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@ -528,17 +528,17 @@ computeCPUHierarchyMasks(int maxLogicalID, int maxCoreID)
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sHierarchyMask[CPU_TOPOLOGY_CORE] = (maxCoreID - 1) * kMaxSMTID;
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sHierarchyShift[CPU_TOPOLOGY_CORE]
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= countSetBits(sHierarchyMask[CPU_TOPOLOGY_SMT]);
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= count_set_bits(sHierarchyMask[CPU_TOPOLOGY_SMT]);
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const uint32 kSinglePackageMask = sHierarchyMask[CPU_TOPOLOGY_SMT]
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| sHierarchyMask[CPU_TOPOLOGY_CORE];
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sHierarchyMask[CPU_TOPOLOGY_PACKAGE] = ~kSinglePackageMask;
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sHierarchyShift[CPU_TOPOLOGY_PACKAGE] = countSetBits(kSinglePackageMask);
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sHierarchyShift[CPU_TOPOLOGY_PACKAGE] = count_set_bits(kSinglePackageMask);
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}
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static uint32
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getCPULegacyInitialAPICID(int /* currentCPU */)
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get_cpu_legacy_initial_apic_id(int /* currentCPU */)
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{
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cpuid_info cpuid;
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get_current_cpuid(&cpuid, 1, 0);
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@ -547,13 +547,13 @@ getCPULegacyInitialAPICID(int /* currentCPU */)
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static inline status_t
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detectAMDCPUTopology(uint32 maxBasicLeaf, uint32 maxExtendedLeaf)
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detect_amd_cpu_topology(uint32 maxBasicLeaf, uint32 maxExtendedLeaf)
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{
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sGetCPUTopologyID = getCPULegacyInitialAPICID;
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sGetCPUTopologyID = get_cpu_legacy_initial_apic_id;
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cpuid_info cpuid;
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get_current_cpuid(&cpuid, 1, 0);
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int maxLogicalID = nextPowerOf2((cpuid.regs.ebx >> 16) & 0xff);
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int maxLogicalID = next_power_of_2((cpuid.regs.ebx >> 16) & 0xff);
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int maxCoreID = 1;
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if (maxExtendedLeaf >= 0x80000008) {
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@ -562,7 +562,7 @@ detectAMDCPUTopology(uint32 maxBasicLeaf, uint32 maxExtendedLeaf)
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if (maxCoreID != 0)
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maxCoreID = 1 << maxCoreID;
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else
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maxCoreID = nextPowerOf2((cpuid.regs.edx & 0xf) + 1);
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maxCoreID = next_power_of_2((cpuid.regs.edx & 0xf) + 1);
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}
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if (maxExtendedLeaf >= 0x80000001) {
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@ -572,14 +572,14 @@ detectAMDCPUTopology(uint32 maxBasicLeaf, uint32 maxExtendedLeaf)
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maxCoreID = maxLogicalID;
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}
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computeCPUHierarchyMasks(maxLogicalID, maxCoreID);
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compute_cpu_hierarchy_masks(maxLogicalID, maxCoreID);
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return B_OK;
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}
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static void
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detectAMDCacheTopology(uint32 maxExtendedLeaf)
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detect_amd_cache_topology(uint32 maxExtendedLeaf)
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{
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if (!x86_check_feature(IA32_FEATURE_AMD_EXT_TOPOLOGY, FEATURE_EXT_AMD_ECX))
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return;
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@ -599,7 +599,7 @@ detectAMDCacheTopology(uint32 maxExtendedLeaf)
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cacheType = cpuid.regs.eax & 0x1f;
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int cacheLevel = (cpuid.regs.eax >> 5) & 0x7;
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int coresCount = nextPowerOf2(((cpuid.regs.eax >> 14) & 0x3f) + 1);
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int coresCount = next_power_of_2(((cpuid.regs.eax >> 14) & 0x3f) + 1);
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hierarchyLevels[cacheLevel - 1]
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= coresCount * (sHierarchyMask[CPU_TOPOLOGY_SMT] + 1);
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@ -616,7 +616,7 @@ detectAMDCacheTopology(uint32 maxExtendedLeaf)
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static uint32
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getIntelCPUInitialx2APICID(int /* currentCPU */)
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get_intel_cpu_initial_x2apic_id(int /* currentCPU */)
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{
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cpuid_info cpuid;
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get_current_cpuid(&cpuid, 11, 0);
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@ -625,7 +625,7 @@ getIntelCPUInitialx2APICID(int /* currentCPU */)
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static inline status_t
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detectIntelCPUTopologyx2APIC(uint32 maxBasicLeaf)
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detect_intel_cpu_topology_x2apic(uint32 maxBasicLeaf)
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{
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if (maxBasicLeaf < 11)
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return B_UNSUPPORTED;
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@ -657,7 +657,7 @@ detectIntelCPUTopologyx2APIC(uint32 maxBasicLeaf)
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currentLevel++;
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} while (levelType != 0 && levelsSet != 3);
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sGetCPUTopologyID = getIntelCPUInitialx2APICID;
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sGetCPUTopologyID = get_intel_cpu_initial_x2apic_id;
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for (int i = 0; i < CPU_TOPOLOGY_LEVELS; i++) {
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uint32 mask = ~uint32(0);
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@ -674,29 +674,29 @@ detectIntelCPUTopologyx2APIC(uint32 maxBasicLeaf)
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static inline status_t
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detectIntelCPUTopologyLegacy(uint32 maxBasicLeaf)
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detect_intel_cpu_topology_legacy(uint32 maxBasicLeaf)
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{
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sGetCPUTopologyID = getCPULegacyInitialAPICID;
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sGetCPUTopologyID = get_cpu_legacy_initial_apic_id;
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cpuid_info cpuid;
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get_current_cpuid(&cpuid, 1, 0);
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int maxLogicalID = nextPowerOf2((cpuid.regs.ebx >> 16) & 0xff);
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int maxLogicalID = next_power_of_2((cpuid.regs.ebx >> 16) & 0xff);
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int maxCoreID = 1;
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if (maxBasicLeaf >= 4) {
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get_current_cpuid(&cpuid, 4, 0);
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maxCoreID = nextPowerOf2((cpuid.regs.eax >> 26) + 1);
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maxCoreID = next_power_of_2((cpuid.regs.eax >> 26) + 1);
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}
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computeCPUHierarchyMasks(maxLogicalID, maxCoreID);
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compute_cpu_hierarchy_masks(maxLogicalID, maxCoreID);
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return B_OK;
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}
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static void
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detectIntelCacheTopology(uint32 maxBasicLeaf)
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detect_intel_cache_topology(uint32 maxBasicLeaf)
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{
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if (maxBasicLeaf < 4)
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return;
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@ -714,7 +714,7 @@ detectIntelCacheTopology(uint32 maxBasicLeaf)
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int cacheLevel = (cpuid.regs.eax >> 5) & 0x7;
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hierarchyLevels[cacheLevel - 1]
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= nextPowerOf2(((cpuid.regs.eax >> 14) & 0x3f) + 1);
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= next_power_of_2(((cpuid.regs.eax >> 14) & 0x3f) + 1);
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if (cacheType != 0)
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maxCacheLevel = max_c(maxCacheLevel, cacheLevel);
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@ -730,14 +730,14 @@ detectIntelCacheTopology(uint32 maxBasicLeaf)
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static uint32
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getSimpleCPUTopologyID(int currentCPU)
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get_simple_cpu_topology_id(int currentCPU)
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{
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return currentCPU;
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}
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static inline int
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getTopologyLevelID(uint32 id, cpu_topology_level level)
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get_topology_level_id(uint32 id, cpu_topology_level level)
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{
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ASSERT(level < CPU_TOPOLOGY_LEVELS);
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return (id & sHierarchyMask[level]) >> sHierarchyShift[level];
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@ -745,7 +745,7 @@ getTopologyLevelID(uint32 id, cpu_topology_level level)
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static void
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detectCPUTopology(int currentCPU, cpu_ent* cpu, uint32 maxBasicLeaf,
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detect_cpu_topology(int currentCPU, cpu_ent* cpu, uint32 maxBasicLeaf,
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uint32 maxExtendedLeaf)
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{
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if (currentCPU == 0) {
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@ -754,26 +754,26 @@ detectCPUTopology(int currentCPU, cpu_ent* cpu, uint32 maxBasicLeaf,
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status_t result = B_UNSUPPORTED;
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if (x86_check_feature(IA32_FEATURE_HTT, FEATURE_COMMON)) {
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if (cpu->arch.vendor == VENDOR_AMD) {
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result = detectAMDCPUTopology(maxBasicLeaf, maxExtendedLeaf);
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result = detect_amd_cpu_topology(maxBasicLeaf, maxExtendedLeaf);
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if (result == B_OK)
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detectAMDCacheTopology(maxExtendedLeaf);
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detect_amd_cache_topology(maxExtendedLeaf);
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}
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if (cpu->arch.vendor == VENDOR_INTEL) {
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result = detectIntelCPUTopologyx2APIC(maxBasicLeaf);
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result = detect_intel_cpu_topology_x2apic(maxBasicLeaf);
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if (result != B_OK)
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result = detectIntelCPUTopologyLegacy(maxBasicLeaf);
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result = detect_intel_cpu_topology_legacy(maxBasicLeaf);
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if (result == B_OK)
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detectIntelCacheTopology(maxBasicLeaf);
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detect_intel_cache_topology(maxBasicLeaf);
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}
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}
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if (result != B_OK) {
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dprintf("No CPU topology information available.\n");
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sGetCPUTopologyID = getSimpleCPUTopologyID;
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sGetCPUTopologyID = get_simple_cpu_topology_id;
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sHierarchyMask[CPU_TOPOLOGY_PACKAGE] = ~uint32(0);
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}
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@ -782,13 +782,13 @@ detectCPUTopology(int currentCPU, cpu_ent* cpu, uint32 maxBasicLeaf,
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ASSERT(sGetCPUTopologyID != NULL);
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int topologyID = sGetCPUTopologyID(currentCPU);
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cpu->topology_id[CPU_TOPOLOGY_SMT]
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= getTopologyLevelID(topologyID, CPU_TOPOLOGY_SMT);
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= get_topology_level_id(topologyID, CPU_TOPOLOGY_SMT);
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cpu->topology_id[CPU_TOPOLOGY_CORE]
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= getTopologyLevelID(topologyID, CPU_TOPOLOGY_CORE);
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= get_topology_level_id(topologyID, CPU_TOPOLOGY_CORE);
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cpu->topology_id[CPU_TOPOLOGY_PACKAGE]
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= getTopologyLevelID(topologyID, CPU_TOPOLOGY_PACKAGE);
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= get_topology_level_id(topologyID, CPU_TOPOLOGY_PACKAGE);
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int i;
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unsigned int i;
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for (i = 0; i < sCacheLevelCount; i++)
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cpu->cache_id[i] = topologyID & sCacheSharingMask[i];
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for (; i < CPU_MAX_CACHE_LEVEL; i++)
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@ -802,8 +802,8 @@ detectCPUTopology(int currentCPU, cpu_ent* cpu, uint32 maxBasicLeaf,
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if (sCacheLevelCount > 0) {
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char cacheLevels[256];
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int offset = 0;
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for (int i = 0; i < sCacheLevelCount; i++) {
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unsigned int offset = 0;
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for (i = 0; i < sCacheLevelCount; i++) {
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offset += snprintf(cacheLevels + offset,
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sizeof(cacheLevels) - offset,
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" L%d id %d%s", i + 1, cpu->cache_id[i],
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@ -936,7 +936,7 @@ detect_cpu(int currentCPU)
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cpu->arch.feature[FEATURE_6_ECX] = cpuid.regs.ecx;
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}
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detectCPUTopology(currentCPU, cpu, maxBasicLeaf, maxExtendedLeaf);
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detect_cpu_topology(currentCPU, cpu, maxBasicLeaf, maxExtendedLeaf);
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#if DUMP_FEATURE_STRING
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dump_feature_string(currentCPU, cpu);
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