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added flatpanel registerdump

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git-svn-id: file:///srv/svn/repos/haiku/trunk/current@6931 a95241bf-73f2-0310-859d-f6bbb57e9c96
This commit is contained in:
Rudolf Cornelissen 2004-03-08 11:02:20 +00:00
parent 4a89640d25
commit 6f5cefa919
3 changed files with 98 additions and 7 deletions
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40
headers/private/graphics/nvidia/nv_macros.h
View File

@ -482,9 +482,28 @@
#define NVDAC_GENCTRL 0x00680600
#define NVDAC_TSTCTRL 0x00680608
#define NVDAC_TSTDATA 0x00680610
/* (flatpanel registers) */
/* (flatpanel registers: confirmed for TNT2 and up) */
#define NVDAC_FP_VDISPEND 0x00680800
#define NVDAC_FP_VTOTAL 0x00680804
#define NVDAC_FP_VCRTC 0x00680808
#define NVDAC_FP_VSYNC_S 0x0068080c
#define NVDAC_FP_VSYNC_E 0x00680810
#define NVDAC_FP_VVALID_S 0x00680814
#define NVDAC_FP_VVALID_E 0x00680818
#define NVDAC_FP_HDISPEND 0x00680820
#define NVDAC_FP_HTOTAL 0x00680824
#define NVDAC_FP_HCRTC 0x00680828
#define NVDAC_FP_HSYNC_S 0x0068082c
#define NVDAC_FP_HSYNC_E 0x00680830
#define NVDAC_FP_HVALID_S 0x00680834
#define NVDAC_FP_HVALID_E 0x00680838
#define NVDAC_FP_CHKSUM 0x00680840
#define NVDAC_FP_TST_CTRL 0x00680844
#define NVDAC_FP_TG_CTRL 0x00680848
#define NVDAC_FP_DEBUG0 0x00680880
#define NVDAC_FP_DEBUG1 0x00680884
#define NVDAC_FP_DEBUG2 0x00680888
#define NVDAC_FP_DEBUG3 0x0068088c
/* secondary head */
#define NVDAC2_CURPOS 0x00682300
#define NVDAC2_PIXPLLC 0x00680520
@ -494,7 +513,26 @@
#define NVDAC2_TSTCTRL 0x00682608
/* (flatpanel registers) */
#define NVDAC2_FP_VDISPEND 0x00682800
#define NVDAC2_FP_VTOTAL 0x00682804
#define NVDAC2_FP_VCRTC 0x00682808
#define NVDAC2_FP_VSYNC_S 0x0068280c
#define NVDAC2_FP_VSYNC_E 0x00682810
#define NVDAC2_FP_VVALID_S 0x00682814
#define NVDAC2_FP_VVALID_E 0x00682818
#define NVDAC2_FP_HDISPEND 0x00682820
#define NVDAC2_FP_HTOTAL 0x00682824
#define NVDAC2_FP_HCRTC 0x00682828
#define NVDAC2_FP_HSYNC_S 0x0068282c
#define NVDAC2_FP_HSYNC_E 0x00682830
#define NVDAC2_FP_HVALID_S 0x00682834
#define NVDAC2_FP_HVALID_E 0x00682838
#define NVDAC2_FP_CHKSUM 0x00682840
#define NVDAC2_FP_TST_CTRL 0x00682844
#define NVDAC2_FP_TG_CTRL 0x00682848
#define NVDAC2_FP_DEBUG0 0x00682880
#define NVDAC2_FP_DEBUG1 0x00682884
#define NVDAC2_FP_DEBUG2 0x00682888
#define NVDAC2_FP_DEBUG3 0x0068288c
/* Nvidia CRTC indexed registers */
/* VGA standard registers: */

2
src/add-ons/accelerants/nvidia/engine/nv_general.c
View File

@ -80,7 +80,7 @@ status_t nv_general_powerup()
{
status_t status;
LOG(1,("POWERUP: nVidia (open)BeOS Accelerant 0.10-2 running.\n"));
LOG(1,("POWERUP: nVidia (open)BeOS Accelerant 0.10-3 running.\n"));
/* preset no laptop */
si->ps.laptop = false;

63
src/add-ons/accelerants/nvidia/engine/nv_info.c
View File

@ -357,6 +357,60 @@ static void detect_panels()
}
}
}
/* dump some panel configuration registers... */
LOG(2,("INFO: Dumping flatpanel registers:\n"));
LOG(2,("DAC1: FP_HDISPEND: $%08x = (dec) %d\n", DACR(FP_HDISPEND),DACR(FP_HDISPEND)));
LOG(2,("DAC1: FP_HTOTAL: $%08x = (dec) %d\n", DACR(FP_HTOTAL),DACR(FP_HTOTAL)));
LOG(2,("DAC1: FP_HCRTC: $%08x = (dec) %d\n", DACR(FP_HCRTC),DACR(FP_HCRTC)));
LOG(2,("DAC1: FP_HSYNC_S: $%08x = (dec) %d\n", DACR(FP_HSYNC_S),DACR(FP_HSYNC_S)));
LOG(2,("DAC1: FP_HSYNC_E: $%08x = (dec) %d\n", DACR(FP_HSYNC_E),DACR(FP_HSYNC_E)));
LOG(2,("DAC1: FP_HVALID_S: $%08x = (dec) %d\n", DACR(FP_HVALID_S),DACR(FP_HVALID_S)));
LOG(2,("DAC1: FP_HVALID_E: $%08x = (dec) %d\n", DACR(FP_HVALID_E),DACR(FP_HVALID_E)));
LOG(2,("DAC1: FP_VDISPEND: $%08x = (dec) %d\n", DACR(FP_VDISPEND),DACR(FP_VDISPEND)));
LOG(2,("DAC1: FP_VTOTAL: $%08x = (dec) %d\n", DACR(FP_VTOTAL),DACR(FP_VTOTAL)));
LOG(2,("DAC1: FP_VCRTC: $%08x = (dec) %d\n", DACR(FP_VCRTC),DACR(FP_VCRTC)));
LOG(2,("DAC1: FP_VSYNC_S: $%08x = (dec) %d\n", DACR(FP_VSYNC_S),DACR(FP_VSYNC_S)));
LOG(2,("DAC1: FP_VSYNC_E: $%08x = (dec) %d\n", DACR(FP_VSYNC_E),DACR(FP_VSYNC_E)));
LOG(2,("DAC1: FP_VVALID_S: $%08x = (dec) %d\n", DACR(FP_VVALID_S),DACR(FP_VVALID_S)));
LOG(2,("DAC1: FP_VVALID_E: $%08x = (dec) %d\n", DACR(FP_VVALID_E),DACR(FP_VVALID_E)));
LOG(2,("DAC1: FP_CHKSUM: $%08x = (dec) %d\n", DACR(FP_CHKSUM),DACR(FP_CHKSUM)));
LOG(2,("DAC1: FP_TST_CTRL: $%08x = (dec) %d\n", DACR(FP_TST_CTRL),DACR(FP_TST_CTRL)));
LOG(2,("DAC1: FP_TG_CTRL: $%08x = (dec) %d\n", DACR(FP_TG_CTRL),DACR(FP_TG_CTRL)));
LOG(2,("DAC1: FP_DEBUG0: $%08x = (dec) %d\n", DACR(FP_DEBUG0),DACR(FP_DEBUG0)));
LOG(2,("DAC1: FP_DEBUG1: $%08x = (dec) %d\n", DACR(FP_DEBUG1),DACR(FP_DEBUG1)));
LOG(2,("DAC1: FP_DEBUG2: $%08x = (dec) %d\n", DACR(FP_DEBUG2),DACR(FP_DEBUG2)));
LOG(2,("DAC1: FP_DEBUG3: $%08x = (dec) %d\n", DACR(FP_DEBUG3),DACR(FP_DEBUG3)));
if(si->ps.secondary_head)
{
LOG(2,("DAC2: FP_HDISPEND: $%08x = (dec) %d\n", DAC2R(FP_HDISPEND),DAC2R(FP_HDISPEND)));
LOG(2,("DAC2: FP_HTOTAL: $%08x = (dec) %d\n", DAC2R(FP_HTOTAL),DAC2R(FP_HTOTAL)));
LOG(2,("DAC2: FP_HCRTC: $%08x = (dec) %d\n", DAC2R(FP_HCRTC),DAC2R(FP_HCRTC)));
LOG(2,("DAC2: FP_HSYNC_S: $%08x = (dec) %d\n", DAC2R(FP_HSYNC_S),DAC2R(FP_HSYNC_S)));
LOG(2,("DAC2: FP_HSYNC_E: $%08x = (dec) %d\n", DAC2R(FP_HSYNC_E),DAC2R(FP_HSYNC_E)));
LOG(2,("DAC2: FP_HVALID_S: $%08x = (dec) %d\n", DAC2R(FP_HVALID_S),DAC2R(FP_HVALID_S)));
LOG(2,("DAC2: FP_HVALID_E: $%08x = (dec) %d\n", DAC2R(FP_HVALID_E),DAC2R(FP_HVALID_E)));
LOG(2,("DAC2: FP_VDISPEND: $%08x = (dec) %d\n", DAC2R(FP_VDISPEND),DAC2R(FP_VDISPEND)));
LOG(2,("DAC2: FP_VTOTAL: $%08x = (dec) %d\n", DAC2R(FP_VTOTAL),DAC2R(FP_VTOTAL)));
LOG(2,("DAC2: FP_VCRTC: $%08x = (dec) %d\n", DAC2R(FP_VCRTC),DAC2R(FP_VCRTC)));
LOG(2,("DAC2: FP_VSYNC_S: $%08x = (dec) %d\n", DAC2R(FP_VSYNC_S),DAC2R(FP_VSYNC_S)));
LOG(2,("DAC2: FP_VSYNC_E: $%08x = (dec) %d\n", DAC2R(FP_VSYNC_E),DAC2R(FP_VSYNC_E)));
LOG(2,("DAC2: FP_VVALID_S: $%08x = (dec) %d\n", DAC2R(FP_VVALID_S),DAC2R(FP_VVALID_S)));
LOG(2,("DAC2: FP_VVALID_E: $%08x = (dec) %d\n", DAC2R(FP_VVALID_E),DAC2R(FP_VVALID_E)));
LOG(2,("DAC2: FP_CHKSUM: $%08x = (dec) %d\n", DAC2R(FP_CHKSUM),DAC2R(FP_CHKSUM)));
LOG(2,("DAC2: FP_TST_CTRL: $%08x = (dec) %d\n", DAC2R(FP_TST_CTRL),DAC2R(FP_TST_CTRL)));
LOG(2,("DAC2: FP_TG_CTRL: $%08x = (dec) %d\n", DAC2R(FP_TG_CTRL),DAC2R(FP_TG_CTRL)));
LOG(2,("DAC2: FP_DEBUG0: $%08x = (dec) %d\n", DAC2R(FP_DEBUG0),DAC2R(FP_DEBUG0)));
LOG(2,("DAC2: FP_DEBUG1: $%08x = (dec) %d\n", DAC2R(FP_DEBUG1),DAC2R(FP_DEBUG1)));
LOG(2,("DAC2: FP_DEBUG2: $%08x = (dec) %d\n", DAC2R(FP_DEBUG2),DAC2R(FP_DEBUG2)));
LOG(2,("DAC2: FP_DEBUG3: $%08x = (dec) %d\n", DAC2R(FP_DEBUG3),DAC2R(FP_DEBUG3)));
}
LOG(2,("INFO: End flatpanel registers dump.\n"));
}
static void pinsnv4_fake(void)
@ -804,16 +858,15 @@ void dump_pins(void)
{
LOG(2,("found DFP (digital flatpanel) on CRTC1; CRTC1 is "));
if (si->ps.slaved_tmds1) LOG(2,("slaved\n")); else LOG(2,("master\n"));
LOG(2,("panel width: %d\n", si->ps.panel1_width));
LOG(2,("panel height: %d\n", si->ps.panel1_height));
LOG(2,("panel width: %d, height: %d\n",
si->ps.panel1_width, si->ps.panel1_height));
}
if (si->ps.tmds2_active)
{
LOG(2,("found DFP (digital flatpanel) on CRTC2; CRTC2 is "));
if (si->ps.slaved_tmds2) LOG(2,("slaved\n")); else LOG(2,("master\n"));
LOG(2,("panel width: %d\n", si->ps.panel2_width));
LOG(2,("panel height: %d\n", si->ps.panel2_height));
LOG(2,("panel width: %d, height: %d\n",
si->ps.panel2_width, si->ps.panel2_height));
}
LOG(2,("INFO: end pinsdump.\n"));
}