made code style more consistent with the rest of the driver

git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@33815 a95241bf-73f2-0310-859d-f6bbb57e9c96
This commit is contained in:
Brecht Machiels 2009-10-28 18:58:36 +00:00
parent ef831a1dc3
commit 6cae2161f0
5 changed files with 29 additions and 48 deletions

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@ -5,7 +5,6 @@ SetSubDirSupportedPlatformsBeOSCompatible ;
UsePrivateHeaders graphics ; UsePrivateHeaders graphics ;
UsePrivateHeaders [ FDirName graphics intel_extreme ] ; UsePrivateHeaders [ FDirName graphics intel_extreme ] ;
UsePrivateHeaders [ FDirName graphics common ] ; UsePrivateHeaders [ FDirName graphics common ] ;
UsePrivateHeaders shared ;
Addon intel_extreme.accelerant : Addon intel_extreme.accelerant :
accelerant.cpp accelerant.cpp

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@ -7,7 +7,6 @@ UsePrivateHeaders [ FDirName kernel arch $(TARGET_ARCH) ] ;
UsePrivateHeaders [ FDirName graphics intel_extreme ] ; UsePrivateHeaders [ FDirName graphics intel_extreme ] ;
UsePrivateHeaders [ FDirName graphics common ] ; UsePrivateHeaders [ FDirName graphics common ] ;
UsePrivateHeaders drivers graphics kernel ; UsePrivateHeaders drivers graphics kernel ;
UsePrivateHeaders shared ;
KernelAddon <agp_gart>intel : KernelAddon <agp_gart>intel :
intel_gart.cpp intel_gart.cpp

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@ -149,23 +149,21 @@ determine_memory_sizes(intel_info &info, size_t &gttSize, size_t &stolenSize)
break; break;
} }
} else if ((info.type & INTEL_TYPE_GROUP_MASK) == INTEL_TYPE_G4x) { } else if ((info.type & INTEL_TYPE_GROUP_MASK) == INTEL_TYPE_G4x) {
switch (memoryConfig & G4X_GGC_GGMS_MASK) { switch (memoryConfig & G4X_GTT_MASK) {
case G4X_GGMS_NONE: case G4X_GTT_NONE:
gttSize = 0; gttSize = 0;
break; break;
case G4X_GGMS_NO_IVT_1M: case G4X_GTT_1M_NO_IVT:
gttSize = 1 << 20; gttSize = 1 << 20;
break; break;
case G4X_GGMS_NO_IVT_2M: case G4X_GTT_2M_NO_IVT:
case G4X_GTT_2M_IVT:
gttSize = 2 << 20; gttSize = 2 << 20;
break; break;
case G4X_GGMS_IVT_2M: case G4X_GTT_3M_IVT:
gttSize = 2 << 20;
break;
case G4X_GGMS_IVT_3M:
gttSize = 3 << 20; gttSize = 3 << 20;
break; break;
case G4X_GGMS_IVT_4M: case G4X_GTT_4M_IVT:
gttSize = 4 << 20; gttSize = 4 << 20;
break; break;
} }
@ -205,33 +203,6 @@ determine_memory_sizes(intel_info &info, size_t &gttSize, size_t &stolenSize)
memorySize *= 8; memorySize *= 8;
break; break;
} }
} else if (info.type == INTEL_TYPE_G4x) {
switch (memoryConfig & G4X_GGC_GMS_MASK) {
case G4X_GMS_32MB:
memorySize *= 32;
break;
case G4X_GMS_64MB:
memorySize *= 64;
break;
case G4X_GMS_128MB:
memorySize *= 128;
break;
case G4X_GMS_256MB:
memorySize *= 256;
break;
case G4X_GMS_96MB:
memorySize *= 96;
break;
case G4X_GMS_160MB:
memorySize *= 160;
break;
case G4X_GMS_224MB:
memorySize *= 224;
break;
case G4X_GMS_352MB:
memorySize *= 352;
break;
}
} else if (info.type == INTEL_TYPE_85x } else if (info.type == INTEL_TYPE_85x
|| (info.type & INTEL_TYPE_9xx) == INTEL_TYPE_9xx) { || (info.type & INTEL_TYPE_9xx) == INTEL_TYPE_9xx) {
switch (memoryConfig & STOLEN_MEMORY_MASK) { switch (memoryConfig & STOLEN_MEMORY_MASK) {
@ -259,6 +230,18 @@ determine_memory_sizes(intel_info &info, size_t &gttSize, size_t &stolenSize)
case i855_STOLEN_MEMORY_256M: case i855_STOLEN_MEMORY_256M:
memorySize *= 256; memorySize *= 256;
break; break;
case G4X_STOLEN_MEMORY_96MB:
memorySize *= 96;
break;
case G4X_STOLEN_MEMORY_160MB:
memorySize *= 160;
break;
case G4X_STOLEN_MEMORY_224MB:
memorySize *= 224;
break;
case G4X_STOLEN_MEMORY_352MB:
memorySize *= 352;
break;
} }
} else { } else {
// TODO: error out! // TODO: error out!
@ -329,12 +312,13 @@ intel_map(intel_info &info)
if (get_memory_map(scratchAddress, B_PAGE_SIZE, &entry, 1) != B_OK) if (get_memory_map(scratchAddress, B_PAGE_SIZE, &entry, 1) != B_OK)
return B_ERROR; return B_ERROR;
if ((info.type & INTEL_TYPE_GROUP_MASK) == INTEL_TYPE_G4x) if ((info.type & INTEL_TYPE_FAMILY_MASK) == INTEL_TYPE_9xx) {
info.gtt_physical_base = info.display.u.h0.base_registers[mmioIndex] if ((info.type & INTEL_TYPE_GROUP_MASK) == INTEL_TYPE_G4x) {
+ (2UL << 20); info.gtt_physical_base = info.display.u.h0.base_registers[mmioIndex]
else if ((info.type & INTEL_TYPE_FAMILY_MASK) == INTEL_TYPE_9xx) + (2UL << 20);
info.gtt_physical_base = get_pci_config(info.display, i915_GTT_BASE, 4); } else
else { info.gtt_physical_base = get_pci_config(info.display, i915_GTT_BASE, 4);
} else {
info.gtt_physical_base = read32(info.registers info.gtt_physical_base = read32(info.registers
+ INTEL_PAGE_TABLE_CONTROL) & ~PAGE_TABLE_ENABLED; + INTEL_PAGE_TABLE_CONTROL) & ~PAGE_TABLE_ENABLED;
if (info.gtt_physical_base == 0) { if (info.gtt_physical_base == 0) {

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@ -5,7 +5,6 @@ SetSubDirSupportedPlatformsBeOSCompatible ;
UsePrivateHeaders [ FDirName graphics intel_extreme ] ; UsePrivateHeaders [ FDirName graphics intel_extreme ] ;
UsePrivateHeaders [ FDirName graphics common ] ; UsePrivateHeaders [ FDirName graphics common ] ;
UsePrivateHeaders graphics kernel ; UsePrivateHeaders graphics kernel ;
UsePrivateHeaders shared ;
KernelAddon intel_extreme : KernelAddon intel_extreme :
driver.cpp driver.cpp

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@ -247,13 +247,13 @@ intel_extreme_init(intel_info &info)
} else if (info.device_type.InGroup(INTEL_TYPE_G4x)) { } else if (info.device_type.InGroup(INTEL_TYPE_G4x)) {
dprintf("G4x clock gating\n"); dprintf("G4x clock gating\n");
write32(info.registers + 0x6204, 0); write32(info.registers + 0x6204, 0);
write32(info.registers + 0x6208, BIT(9) | BIT(7) | BIT(6)); write32(info.registers + 0x6208, (1L << 9) | (1L << 7) | (1L << 6));
write32(info.registers + 0x6210, 0); write32(info.registers + 0x6210, 0);
uint32 dspclk_gate_val = BIT(28) | BIT(3) | BIT(2); uint32 dspclk_gate_val = (1L << 28) | (1L << 3) | (1L << 2);
if ((info.device_type.type & INTEL_TYPE_MOBILE) == INTEL_TYPE_MOBILE) { if ((info.device_type.type & INTEL_TYPE_MOBILE) == INTEL_TYPE_MOBILE) {
dprintf("G4x mobile clock gating\n"); dprintf("G4x mobile clock gating\n");
dspclk_gate_val |= BIT(18); dspclk_gate_val |= 1L << 18;
} }
write32(info.registers + 0x6200, dspclk_gate_val) ; write32(info.registers + 0x6200, dspclk_gate_val) ;