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radeon_hd: Fix bytes per row passed to app_server

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* Video modes with widths that are not multiples of
  32 were failing to set
* Should solve analog "skewed display"
* Add debugging on adjusted framebuffer pitch
* Thanks go out to AMD open source developers for
  the help tracking this one down!
This commit is contained in:
Alexander von Gluck IV 2012-03-29 06:59:49 -05:00
parent 7e9cb02755
commit 6aaadd60dd
1 changed files with 9 additions and 3 deletions
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12
src/add-ons/accelerants/radeon_hd/display.cpp
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@ -627,8 +627,8 @@ display_crtc_fb_set(uint8 crtcID, display_mode* mode)
}
// Align our framebuffer width
int widthAligned = mode->virtual_width;
int pitchMask = 0;
uint32 widthAligned = mode->virtual_width;
uint32 pitchMask = 0;
switch (bytesPerPixel) {
case 1:
@ -645,6 +645,12 @@ display_crtc_fb_set(uint8 crtcID, display_mode* mode)
widthAligned += pitchMask;
widthAligned &= ~pitchMask;
TRACE("%s: fb: %" B_PRIu32 "x%" B_PRIu32 " (%" B_PRIu32 " bpp)\n", __func__,
mode->virtual_width, mode->virtual_height, bitsPerPixel);
TRACE("%s: fb pitch: %" B_PRIu32 " \n", __func__,
widthAligned * bytesPerPixel / 4);
TRACE("%s: fb width aligned: %" B_PRIu32 "\n", __func__,
widthAligned);
Write32(CRT, regs->grphSurfaceOffsetX, 0);
Write32(CRT, regs->grphSurfaceOffsetY, 0);
@ -686,7 +692,7 @@ display_crtc_fb_set(uint8 crtcID, display_mode* mode)
}
// update shared info
gInfo->shared_info->bytes_per_row = mode->virtual_width * bytesPerPixel;
gInfo->shared_info->bytes_per_row = widthAligned * bytesPerPixel;
gInfo->shared_info->current_mode = *mode;
gInfo->shared_info->bits_per_pixel = bitsPerPixel;
}