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Start to cleanup radeon_hd driver.

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git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@36393 a95241bf-73f2-0310-859d-f6bbb57e9c96
This commit is contained in:
Clemens Zeidler 2010-04-21 10:03:01 +00:00
parent eb74edd08b
commit 66f1ecdae7
10 changed files with 4 additions and 406 deletions
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1
src/add-ons/accelerants/radeon_hd/Jamfile
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@ -10,7 +10,6 @@ Addon radeon_hd.accelerant :
accelerant.cpp
engine.cpp
hooks.cpp
memory.cpp
mode.cpp
: be libaccelerantscommon.a
;

82
src/add-ons/accelerants/radeon_hd/accelerant.cpp
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@ -186,62 +186,6 @@ radeon_init_accelerant(int device)
return B_OK;
}
/*
ssize_t
radeon_accelerant_clone_info_size(void)
{
TRACE(("radeon_accelerant_clone_info_size()\n"));
// clone info is device name, so return its maximum size
return B_PATH_NAME_LENGTH;
}
void
radeon_get_accelerant_clone_info(void *info)
{
TRACE(("radeon_get_accelerant_clone_info()\n"));
ioctl(gInfo->device, RADEON_GET_DEVICE_NAME, info, B_PATH_NAME_LENGTH);
}
status_t
radeon_clone_accelerant(void *info)
{
TRACE(("radeon_clone_accelerant()\n"));
// create full device name
char path[B_PATH_NAME_LENGTH];
strcpy(path, "/dev/");
#ifdef __HAIKU__
strlcat(path, (const char *)info, sizeof(path));
#else
strcat(path, (const char *)info);
#endif
int fd = open(path, B_READ_WRITE);
if (fd < 0)
return errno;
status_t status = init_common(fd, true);
if (status != B_OK)
goto err1;
// get read-only clone of supported display modes
status = gInfo->mode_list_area = clone_area(
"intel extreme cloned modes", (void **)&gInfo->mode_list,
B_ANY_ADDRESS, B_READ_AREA, gInfo->shared_info->mode_list_area);
if (status < B_OK)
goto err2;
return B_OK;
err2:
uninit_common();
err1:
close(fd);
return status;
}
*/
/*! This function is called for both, the primary accelerant and all of
its clones.
@ -261,29 +205,3 @@ radeon_uninit_accelerant(void)
uninit_common();
}
/*
status_t
radeon_get_accelerant_device_info(accelerant_device_info *info)
{
TRACE(("radeon_get_accelerant_device_info()\n"));
info->version = B_ACCELERANT_VERSION;
strcpy(info->name, gInfo->shared_info->device_type.InFamily(RADEON_TYPE_7xx)
? "Intel Extreme Graphics 1" : "Intel Extreme Graphics 2");
strcpy(info->chipset, gInfo->shared_info->device_identifier);
strcpy(info->serial_no, "None");
info->memory = gInfo->shared_info->graphics_memory_size;
info->dac_speed = gInfo->shared_info->pll_info.max_frequency;
return B_OK;
}
sem_id
radeon_accelerant_retrace_semaphore()
{
TRACE(("radeon_accelerant_retrace_semaphore()\n"));
return gInfo->shared_info->vblank_sem;
}*/

4
src/add-ons/accelerants/radeon_hd/accelerant.h
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@ -56,10 +56,6 @@ write32(uint32 offset, uint32 value)
*(volatile uint32 *)(gInfo->regs + offset) = value;
}
// memory.cpp
extern void radeon_free_memory(uint32 base);
extern status_t radeon_allocate_memory(size_t size, uint32 flags, uint32 &base);
// modes.cpp
extern status_t create_mode_list(void);

5
src/add-ons/accelerants/radeon_hd/accelerant_protos.h
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@ -21,12 +21,7 @@ void spin(bigtime_t delay);
// general
status_t radeon_init_accelerant(int fd);
ssize_t radeon_accelerant_clone_info_size(void);
void radeon_get_accelerant_clone_info(void *data);
status_t radeon_clone_accelerant(void *data);
void radeon_uninit_accelerant(void);
status_t radeon_get_accelerant_device_info(accelerant_device_info *info);
sem_id radeon_accelerant_retrace_semaphore(void);
// modes & constraints
uint32 radeon_accelerant_mode_count(void);

57
src/add-ons/accelerants/radeon_hd/memory.cpp
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@ -1,57 +0,0 @@
/*
* Copyright 2006-2008, Haiku, Inc. All Rights Reserved.
* Distributed under the terms of the MIT License.
*
* Authors:
* Axel Dörfler, axeld@pinc-software.de
*/
#include "accelerant.h"
#include "radeon_hd.h"
#include <errno.h>
#include <unistd.h>
//#define TRACE_MEMORY
#ifdef TRACE_MEMORY
extern "C" void _sPrintf(const char *format, ...);
# define TRACE(x) _sPrintf x
#else
# define TRACE(x) ;
#endif
void
radeon_free_memory(uint32 base)
{
if (base == 0)
return;
radeon_free_graphics_memory freeMemory;
freeMemory.magic = RADEON_PRIVATE_DATA_MAGIC;
freeMemory.buffer_base = base;
ioctl(gInfo->device, RADEON_FREE_GRAPHICS_MEMORY, &freeMemory,
sizeof(freeMemory));
}
status_t
radeon_allocate_memory(size_t size, uint32 flags, uint32 &base)
{
radeon_allocate_graphics_memory allocMemory;
allocMemory.magic = RADEON_PRIVATE_DATA_MAGIC;
allocMemory.size = size;
allocMemory.alignment = 0;
allocMemory.flags = flags;
if (ioctl(gInfo->device, RADEON_ALLOCATE_GRAPHICS_MEMORY, &allocMemory,
sizeof(allocMemory)) < 0)
return errno;
base = allocMemory.buffer_base;
return B_OK;
}

51
src/add-ons/kernel/drivers/graphics/radeon_hd/device.cpp
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@ -113,8 +113,7 @@ device_open(const char *name, uint32 /*flags*/, void **_cookie)
if (!thisName)
return B_BAD_VALUE;
}
TRACE((DEVICE_NAME ": device id %i\n", id));
radeon_info *info = gDeviceInfo[id];
mutex_lock(&gLock);
@ -197,54 +196,6 @@ device_ioctl(void *data, uint32 op, void *buffer, size_t bufferLength)
#endif
return B_OK;
// graphics mem manager
case RADEON_ALLOCATE_GRAPHICS_MEMORY:
{
radeon_allocate_graphics_memory allocMemory;
#ifdef __HAIKU__
if (user_memcpy(&allocMemory, buffer,
sizeof(radeon_allocate_graphics_memory)) < B_OK)
return B_BAD_ADDRESS;
#else
memcpy(&allocMemory, buffer, sizeof(radeon_allocate_graphics_memory));
#endif
if (allocMemory.magic != RADEON_PRIVATE_DATA_MAGIC)
return B_BAD_VALUE;
status_t status = radeon_allocate_memory(*info, allocMemory.size,
allocMemory.alignment, allocMemory.flags,
(addr_t *)&allocMemory.buffer_base);
if (status == B_OK) {
// copy result
#ifdef __HAIKU__
if (user_memcpy(buffer, &allocMemory,
sizeof(radeon_allocate_graphics_memory)) < B_OK)
return B_BAD_ADDRESS;
#else
memcpy(buffer, &allocMemory,
sizeof(radeon_allocate_graphics_memory));
#endif
}
return status;
}
case RADEON_FREE_GRAPHICS_MEMORY:
{
radeon_free_graphics_memory freeMemory;
#ifdef __HAIKU__
if (user_memcpy(&freeMemory, buffer,
sizeof(radeon_free_graphics_memory)) < B_OK)
return B_BAD_ADDRESS;
#else
memcpy(&freeMemory, buffer, sizeof(radeon_free_graphics_memory));
#endif
if (freeMemory.magic == RADEON_PRIVATE_DATA_MAGIC)
return radeon_free_memory(*info, freeMemory.buffer_base);
break;
}
default:
TRACE((DEVICE_NAME ": ioctl() unknown message %ld (length = %ld)\n",
op, bufferLength));

9
src/add-ons/kernel/drivers/graphics/radeon_hd/driver.cpp
View File

@ -48,7 +48,6 @@ int32 api_version = B_CUR_DRIVER_API_VERSION;
char* gDeviceNames[MAX_CARDS + 1];
radeon_info* gDeviceInfo[MAX_CARDS];
pci_module_info* gPCI;
agp_gart_module_info* gGART;
mutex gLock;
@ -121,13 +120,6 @@ init_driver(void)
return status;
}
status = get_module(B_AGP_GART_MODULE_NAME, (module_info**)&gGART);
if (status != B_OK) {
TRACE((DEVICE_NAME ": AGP GART module unavailable\n"));
put_module(B_PCI_MODULE_NAME);
return status;
}
mutex_init(&gLock, "intel extreme ksync");
// find devices
@ -206,7 +198,6 @@ uninit_driver(void)
free(name);
}
put_module(B_AGP_GART_MODULE_NAME);
put_module(B_PCI_MODULE_NAME);
}

1
src/add-ons/kernel/drivers/graphics/radeon_hd/driver.h
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@ -32,7 +32,6 @@
extern char* gDeviceNames[];
extern radeon_info* gDeviceInfo[];
extern pci_module_info* gPCI;
extern agp_gart_module_info* gGART;
extern mutex gLock;

189
src/add-ons/kernel/drivers/graphics/radeon_hd/radeon_hd.cpp
View File

@ -31,153 +31,11 @@
#endif
static void
init_overlay_registers(overlay_registers *registers)
{
memset(registers, 0, B_PAGE_SIZE);
registers->contrast_correction = 0x48;
registers->saturation_cos_correction = 0x9a;
// this by-passes contrast and saturation correction
}
static void
read_settings(bool &hardwareCursor)
{
hardwareCursor = false;
void *settings = load_driver_settings("radeon_extreme");
if (settings != NULL) {
hardwareCursor = get_driver_boolean_parameter(settings,
"hardware_cursor", true, true);
unload_driver_settings(settings);
}
}
static int32
release_vblank_sem(radeon_info &info)
{
int32 count;
if (get_sem_count(info.shared_info->vblank_sem, &count) == B_OK
&& count < 0) {
release_sem_etc(info.shared_info->vblank_sem, -count,
B_DO_NOT_RESCHEDULE);
return B_INVOKE_SCHEDULER;
}
return B_HANDLED_INTERRUPT;
}
static int32
radeon_interrupt_handler(void *data)
{
radeon_info &info = *(radeon_info *)data;
uint32 identity = read16(info.registers + RADEON_INTERRUPT_IDENTITY);
if (identity == 0)
return B_UNHANDLED_INTERRUPT;
int32 handled = B_HANDLED_INTERRUPT;
if ((identity & INTERRUPT_VBLANK) != 0) {
handled = release_vblank_sem(info);
// make sure we'll get another one of those
write32(info.registers + RADEON_DISPLAY_A_PIPE_STATUS,
DISPLAY_PIPE_VBLANK_STATUS);
}
// setting the bit clears it!
write16(info.registers + RADEON_INTERRUPT_IDENTITY, identity);
return handled;
}
static void
init_interrupt_handler(radeon_info &info)
{
info.shared_info->vblank_sem = create_sem(0, "radeon hd vblank");
if (info.shared_info->vblank_sem < B_OK)
return;
status_t status = B_OK;
// We need to change the owner of the sem to the calling team (usually the
// app_server), because userland apps cannot acquire kernel semaphores
thread_id thread = find_thread(NULL);
thread_info threadInfo;
if (get_thread_info(thread, &threadInfo) != B_OK
|| set_sem_owner(info.shared_info->vblank_sem, threadInfo.team) != B_OK) {
status = B_ERROR;
}
if (status == B_OK && info.pci->u.h0.interrupt_pin != 0x00
&& info.pci->u.h0.interrupt_line != 0xff) {
// we've gotten an interrupt line for us to use
info.fake_interrupts = false;
status = install_io_interrupt_handler(info.pci->u.h0.interrupt_line,
&radeon_interrupt_handler, (void *)&info, 0);
if (status == B_OK) {
// enable interrupts - we only want VBLANK interrupts
write16(info.registers + RADEON_INTERRUPT_ENABLED,
read16(info.registers + RADEON_INTERRUPT_ENABLED)
| INTERRUPT_VBLANK);
write16(info.registers + RADEON_INTERRUPT_MASK, ~INTERRUPT_VBLANK);
write32(info.registers + RADEON_DISPLAY_A_PIPE_STATUS,
DISPLAY_PIPE_VBLANK_STATUS);
write16(info.registers + RADEON_INTERRUPT_IDENTITY, ~0);
}
}
if (status < B_OK) {
// There is no interrupt reserved for us, or we couldn't install our
// interrupt handler, let's fake the vblank interrupt for our clients
// using a timer interrupt
info.fake_interrupts = true;
// TODO: fake interrupts!
status = B_ERROR;
}
if (status < B_OK) {
delete_sem(info.shared_info->vblank_sem);
info.shared_info->vblank_sem = B_ERROR;
}
}
// #pragma mark -
status_t
radeon_free_memory(radeon_info &info, addr_t base)
{
return gGART->free_memory(info.aperture, base);
}
status_t
radeon_allocate_memory(radeon_info &info, size_t size, size_t alignment,
uint32 flags, addr_t *_base, addr_t *_physicalBase)
{
return gGART->allocate_memory(info.aperture, size, alignment,
flags, _base, _physicalBase);
}
enum _rs780MCRegs {
RS78_MC_SYSTEM_STATUS = 0x0,
RS78_MC_FB_LOCATION = 0x10,
RS78_K8_FB_LOCATION = 0x11,
RS78_MC_MISC_UMA_CNTL = 0x12
};
#define RHD_FB_BAR 0
#define RHD_MMIO_BAR 2
status_t
@ -193,13 +51,6 @@ radeon_hd_init(radeon_info &info)
}
// memory mapped I/O
// TODO: registers are mapped twice (by us and radeon_gart), maybe we
// can share it between the drivers
#define RHD_FB_BAR 0
#define RHD_MMIO_BAR 2
AreaKeeper sharedCreator;
info.shared_area = sharedCreator.Create("radeon hd shared info",
@ -245,42 +96,6 @@ radeon_hd_init(radeon_info &info)
info.shared_info->frame_buffer_offset = 0;
info.shared_info->physical_graphics_memory = info.pci->u.h0.base_registers[RHD_FB_BAR];
//?? init_interrupt_handler(info);
#define R6XX_CONFIG_MEMSIZE 0x5428
uint32 fbLocation = read32(info.registers + RS78_K8_FB_LOCATION);
TRACE((DEVICE_NAME "radeon_hd_init() fb pci location %x, intern location %x \n",
info.shared_info->graphics_memory, fbLocation));
uint32 ramSize = read32(info.registers + R6XX_CONFIG_MEMSIZE) >> 10;
TRACE((DEVICE_NAME "radeon_hd_init() ram size %i \n", ramSize));
/*TRACE((DEVICE_NAME "radeon_hd_init() fb size %i \n",
info.pci->u.h0.base_register_sizes[RHD_FB_BAR]));
uint8* fbPosition = info.shared_info->graphics_memory;
fbPosition += 90000;
for (int i = 0; i < 90000; i++) {
*fbPosition = 255;
fbPosition++;
*fbPosition = 0;
fbPosition++;
*fbPosition = 0;
fbPosition++;
}
fbPosition += 90000;
for (int i = 0; i < 90000; i++) {
*fbPosition = 255;
fbPosition++;
*fbPosition = 0;
fbPosition++;
*fbPosition = 0;
fbPosition++;
}*/
TRACE((DEVICE_NAME "radeon_hd_init() completed successfully!\n"));
return B_OK;
}

11
src/add-ons/kernel/drivers/graphics/radeon_hd/radeon_hd_private.h
View File

@ -23,8 +23,6 @@ struct radeon_info {
status_t init_status;
int32 id;
pci_info* pci;
addr_t aperture_base;
aperture_id aperture;
uint8* registers;
area_id registers_area;
area_id framebuffer_area;
@ -32,18 +30,11 @@ struct radeon_info {
struct radeon_shared_info* shared_info;
area_id shared_area;
struct overlay_registers* overlay_registers;
bool fake_interrupts;
const char* device_identifier;
DeviceType device_type;
};
extern status_t radeon_free_memory(radeon_info& info, addr_t offset);
extern status_t radeon_allocate_memory(radeon_info& info, size_t size,
size_t alignment, uint32 flags, addr_t* _offset,
addr_t* _physicalBase = NULL);
extern status_t radeon_hd_init(radeon_info& info);
extern void radeon_hd_uninit(radeon_info& info);