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patch from JiSheng which fixes firewire build warnings and fix atomic_set_int to use atomic_or

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git-svn-id: file:///srv/svn/repos/haiku/haiku/trunk@25181 a95241bf-73f2-0310-859d-f6bbb57e9c96
This commit is contained in:
Jérôme Duval 2008-04-26 15:02:43 +00:00
parent d7f85ef122
commit 66cb27d82e
6 changed files with 24 additions and 14 deletions
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10
headers/private/firewire/firewirereg.h
View File

@ -340,7 +340,7 @@ struct fw_rcv_buf {
u_int nvec;
uint8_t spd;
};
//#ifndef __HAIKU__
void fw_sidrcv (struct firewire_comm *, uint32_t *, u_int);
void fw_rcv (struct fw_rcv_buf *);
void fw_xfer_unload ( struct fw_xfer*);
@ -372,7 +372,7 @@ void fw_drain_txq (struct firewire_comm *);
//int fwdev_destroydev (struct firewire_softc *);
//void fwdev_clone (void *, struct ucred *, char *, int, struct cdev **);
int fw_open_isodma(struct firewire_comm *, int);
//#endif
extern int firewire_debug;
#ifndef __HAIKU__
extern devclass_t firewire_devclass;
@ -414,5 +414,11 @@ extern int firewire_phydma_enable;
MALLOC_DECLARE(M_FW);
MALLOC_DECLARE(M_FWXFER);
#endif /*__HAIKU__*/
#ifdef __HAIKU__
int firewire_attach(struct firewire_comm *fc, struct firewire_softc *sc);
void firewire_detach(struct firewire_softc *sc);
status_t fwohci_pci_attach(int index);
status_t fwohci_pci_detach(int index);
#endif
#endif

4
headers/private/firewire/fwglue.h
View File

@ -30,8 +30,8 @@
typedef uint32_t bus_addr_t;
typedef uint32_t bus_size_t;
#define atomic_readandclear_int(a) atomic_set(a, 0)
#define atomic_set_int(addr, newvalue) atomic_set(addr, newvalue)
#define atomic_readandclear_int(ptr) atomic_set((int32 *)(ptr), 0)
#define atomic_set_int(ptr, value) atomic_or((int32 *)(ptr), value)
#define mtx_lock benaphore_lock
#define mtx_unlock benaphore_unlock

4
src/add-ons/kernel/bus_managers/firewire/firewire.c
View File

@ -354,6 +354,7 @@ firewire_watchdog(void *arg)
hz/WATCHDOG_HZ, B_ONE_SHOT_RELATIVE_TIMER);
}
#if 0//to do
status_t
firewire_add_child(struct firewire_softc *sc, const char *childname,
struct firewire_notify_hooks *hooks)
@ -420,6 +421,7 @@ firewire_remove_child(struct firewire_softc *sc, const char *childname)
return B_NAME_NOT_FOUND;
}
#endif
/*
* The attach routine.
@ -1962,7 +1964,7 @@ fw_rcv(struct fw_rcv_buf *rb)
fp->mode.rreqq.dest_lo);
if(bind == NULL){
printf("Unknown service addr 0x%04x:0x%08x %s(%x)"
" src=0x%x data=%x\n",
" src=0x%x data=%lx\n",
fp->mode.wreqq.dest_hi, fp->mode.wreqq.dest_lo,
tcode_str[tcode], tcode,
fp->mode.hdr.src, ntohl(fp->mode.wreqq.data));

2
src/add-ons/kernel/bus_managers/firewire/firewire_module.c
View File

@ -89,6 +89,7 @@ find_device_name(pci_info *info)
}
#if 0
static status_t
fw_add_child(const char *childname,
const struct firewire_notify_hooks *hooks)
@ -120,6 +121,7 @@ fw_remove_child(const char *childname)
return B_OK;
}
#endif
static int

10
src/add-ons/kernel/bus_managers/firewire/fwohci.c
View File

@ -333,7 +333,7 @@ again:
return((fun >> PHYDEV_RDDATA )& 0xff);
}
/* Device specific ioctl. */
int
static int
fwohci_ioctl (void *cookie, u_long cmd, void *data, size_t len)
{
// struct firewire_softc *sc;
@ -1040,7 +1040,7 @@ kick:
OWRITE(sc, OHCI_DMACTL(off), OHCI_CNTL_DMA_WAKE);
} else {
if (firewire_debug)
device_printf(sc->fc.dev, "start AT DMA status=%x\n",
device_printf(sc->fc.dev, "start AT DMA status=%lx\n",
OREAD(sc, OHCI_DMACTL(off)));
OWRITE(sc, OHCI_DMACMD(off), dbch->top->bus_addr | fsegment);
OWRITE(sc, OHCI_DMACTL(off), OHCI_CNTL_DMA_RUN);
@ -1665,7 +1665,7 @@ fwohci_irx_enable(struct firewire_comm *fc, int dmach)
unsigned short tag, ich;
uint32_t stat;
struct fwohci_dbch *dbch;
struct fwohcidb_tr *db_tr;
// struct fwohcidb_tr *db_tr;
struct fw_bulkxfer *first, *prev, *chunk;
struct fw_xferq *ir;
@ -2896,7 +2896,7 @@ fwohci_arcv(struct fwohci_softc *sc, struct fwohci_dbch *dbch, int count)
default:
device_printf(sc->fc.dev,
"Async DMA Receive error err=%02x %s"
" plen=%d offset=%d len=%d status=0x%08x"
" plen=%d offset=%d len=%d status=0x%08lx"
" tcode=0x%x, stat=0x%08x\n",
event, fwohcicode[event], plen,
dbch->buf_offset, len,
@ -2945,7 +2945,7 @@ out:
return;
err:
device_printf(sc->fc.dev, "AR DMA status=%x, ",
device_printf(sc->fc.dev, "AR DMA status=%lx, ",
OREAD(sc, OHCI_DMACTL(off)));
dbch->pdb_tr = NULL;
/* skip until resCount != 0 */

8
src/add-ons/kernel/bus_managers/firewire/fwohci_pci.c
View File

@ -178,8 +178,8 @@ fwohci_pci_attach(int index)
gPci->write_pci_config(info->bus, info->device, info->function,
PCI_line_size, 1, cache_line);
}
TRACE("latency timer %x -> %x.\n", olatency, latency);
TRACE("cache size %x -> %x.\n", ocache_line, cache_line);
TRACE("latency timer %lx -> %lx.\n", olatency, latency);
TRACE("cache size %lx -> %lx.\n", ocache_line, cache_line);
// get IRQ
sc->irq = gPci->read_pci_config(info->bus, info->device, info->function,
@ -194,8 +194,8 @@ fwohci_pci_attach(int index)
// val = gPci->read_pci_config(info->bus, info->device, info->function, 0x14, 4);
// val &= PCI_address_memory_32_mask;
// TRACE("hardware register address %p\n", (void *) val);
TRACE("hardware register address %x\n", info->u.h0.base_registers[0]);
sc->regArea = map_mem(&sc->regAddr, info->u.h0.base_registers[0], 0x800,
TRACE("hardware register address %lx\n", info->u.h0.base_registers[0]);
sc->regArea = map_mem(&sc->regAddr, (void *)info->u.h0.base_registers[0], 0x800,
B_READ_AREA | B_WRITE_AREA, "fw ohci register");
if (sc->regArea < B_OK) {
ERROR("can't map hardware registers\n");