From 6550124ea0ea4e17caefbf9a60fa6925780f69b9 Mon Sep 17 00:00:00 2001 From: X512 Date: Thu, 11 May 2023 05:39:14 +0900 Subject: [PATCH] riscv64: implement memory barriers Change-Id: Ied9e6dad38968cee6e828dff6ec413e6281086cd Reviewed-on: https://review.haiku-os.org/c/haiku/+/6436 Reviewed-by: waddlesplash --- headers/private/kernel/arch/riscv64/arch_atomic.h | 8 +++----- 1 file changed, 3 insertions(+), 5 deletions(-) diff --git a/headers/private/kernel/arch/riscv64/arch_atomic.h b/headers/private/kernel/arch/riscv64/arch_atomic.h index 8a10e814ed..52f16d9139 100644 --- a/headers/private/kernel/arch/riscv64/arch_atomic.h +++ b/headers/private/kernel/arch/riscv64/arch_atomic.h @@ -12,23 +12,21 @@ static inline void memory_read_barrier_inline(void) { - // TODO: investigate reparate read/write barriers - __sync_synchronize(); + asm volatile("fence ir, ir" : : : "memory"); } static inline void memory_write_barrier_inline(void) { - // TODO: investigate reparate read/write barriers - __sync_synchronize(); + asm volatile("fence ow, ow" : : : "memory"); } static inline void memory_full_barrier_inline(void) { - __sync_synchronize(); + asm volatile("fence iorw, iorw" : : : "memory"); }