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riscv64: implement memory barriers

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Change-Id: Ied9e6dad38968cee6e828dff6ec413e6281086cd
Reviewed-on: https://review.haiku-os.org/c/haiku/+/6436
Reviewed-by: waddlesplash <waddlesplash@gmail.com>
This commit is contained in:
X512 2023-05-11 05:39:14 +09:00 committed by waddlesplash
parent 88306be95c
commit 6550124ea0
1 changed files with 3 additions and 5 deletions
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8
headers/private/kernel/arch/riscv64/arch_atomic.h
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@ -12,23 +12,21 @@
static inline void
memory_read_barrier_inline(void)
{
// TODO: investigate reparate read/write barriers
__sync_synchronize();
asm volatile("fence ir, ir" : : : "memory");
}
static inline void
memory_write_barrier_inline(void)
{
// TODO: investigate reparate read/write barriers
__sync_synchronize();
asm volatile("fence ow, ow" : : : "memory");
}
static inline void
memory_full_barrier_inline(void)
{
__sync_synchronize();
asm volatile("fence iorw, iorw" : : : "memory");
}